新人エンジニアの赤面ブログについて

In this blog, I will introduce the flow to solve the questions and troubles that occurred during the training of Altima's new engineers.
Please use the practical know-how that newcomers full of individuality have acquired through their struggles in their work.

 

役立つ情報 盛りだくさん！

■アナログ関連記事

　・コイルの魔法～昇圧～
　・続！コイルの魔法～昇圧～
　・オシロスコープの引き金 ～トリガを掛ける？～

・ What are the types of resistance? About each feature and use!
・ What are passive components and active components? About each difference!

・ The path to my first circuit design (1) ~Types of DC/DC converters~

■ Program-related articles

・ Types of logic circuits - order? combination? ~
・ The World of Numbers Represented by Bits -Codes-
・ The World of Numbers Represented by Bits -Floating Point Edition-
・ NULL, who the heck are you? ~ indicates the end of the string ~
・ Initial value problem ver.C language
・ Actually the same person! ? arrays and pointers
・ Reality of ASCII code [Part 1] ~ 49 even though it is 1 ? Input/output format ~
・ The Reality of ASCII Codes [Part 2] ~ Correspondence between ASCII Codes and Characters ~
・ Reality of ASCII code [Part 3] - Subtract '0' from num? ~
・ malloc ~challenge to the unknown~
・ Is it unreadable to humans? The Mystery of Binary Files

■ Processor-related articles

・ CPU can do it
・ A watchdog for a microcomputer? watchdog timer
・ Serial and parallel processing
・ [ Nios II ] Booting from on-chip memory ~time short story~　
・ [ Nios II ] Booting from on-chip memory ~ Qsys change ~
・ Frequency by division Get !
・ Great performance in SoC! ? What is the MMU's role? ?
・ Great performance in SoC! ? What is the MMU's role? ? ～ Part 2 ～
・ What are UARTs? ～Difference between serial communication and parallel communication～
・ Let's learn about the much-talked-about IoT ~ 3G, LTE ~

■External Memory Interface関連記事

・ External Memory Interface ～What is memory?～
・ External Memory Interface ～Read/Write?～
・ External Memory Interface ～What is PHY?～
・ External Memory Interface ～ALTMEMPHY? UniPHY?～
・ External Memory Interface ～External memory interface HDR～
・ SDR and DDR ～Processing of DDR data by FPGA～
・ Memory IP ～Accurate and efficient data transfer～
・ Memory IP ～Selection of FPGA～
・ Memory IP ～generation and parameter input～
・ Memory IP ～Save and recall presets～

■クロック製品関連記事

・ About crystal unit matching
・ About the frequency accuracy of the clock generator
・ About ringing
・ About clock signal accuracy notation
・ VCOs and VCXOs
・ Note the amplitude of LVDS
・ The intimate relationship between PLL loop bandwidth and spread spectrum
・ Application of PLL (Let's reduce EMI with spread spectrum!)
・ PLL division/multiplication
・ About buffers
・ Types and application of timing products
・ Why is Real Time Clock 32.768 kHz?
・ Why should I care about Jitter? ?
・ About Jitter
・ The clock is the heart of the system!

■ツール関連記事

・ Build design automatically! ? ～PCI Express～
・ Elimination of test bench allergy
・ Managing Warning Messages in Quartus Prime
・ Configure without launching Quartus Prime! ?
・ Pin Assignment - Which pin is this signal on? ~
・ Lurk inside the FPGA! A bimyo relationship with DSP
・ Trio of IBIS/FPGA/QuartusR II -Specifications are up to you-
・ Megafunction ~ Memories rewind, troubles fast forward ~
・ Megafunction 2 ~An encounter with an error is always sudden~
・ Chef's Whimsical Test Bench ~Secret recipe to save time~
・ A Tale of I/O Standard ~Tools Obedience to Devices~
・ Unused Pin Rhapsody ~Part 1~
・ Unused Pin Rhapsody ~Part 2~
・ Unused Pin Rhapsody ~Extra Edition~
・ Unused Pin Rhapsody ~Continued/Extra Edition~
・ Logic synthesis and placement and routing
・ Useful to know! Programming options!
・ Easy environment reproduction with archive files

■ Configuration-related articles

・ What is configuration mode?
・ Selection of Configuration ROM
・ configuration time
・ Power On Reset
・ FPGA initialization time
・ Difference between FPGA POR and Initialization
・ POR Circuit for MAX V
・ FPGA configuration sequence
・ programming? configuration?
・ Reduce configuration time with data compression!
・ Shorter configuration time in FPP mode!
・ Shorter Configuration Time -Extra Edition-
・ Reducing configuration time -Extra 2-
・ EPCS and EPCQ - Precautions when using -

■ Board design related articles

・ The bimyo relationship between regulators and FPGAs
・ short? open?
・ Mass man's FPGA board production 1 "About the absolute maximum rated voltage"
・ Mass man's FPGA board production 2 "Dumping resistor and overshoot"
・ Mass man's FPGA board production 3 "JTAG configuration failed..."
・ Mass man's FPGA board production 4 "Power supply / GND wiring is the main artery of the board"
・ Mass man's FPGA board production 5 "Points to note when measuring the FPGA board with a multimeter"
・ Mass man's FPGA board production 6 "Measuring FPGA current voltage characteristics with a curve tracer"

・ I made my own DCDC converter! (1) “Explain the process of making an evaluation board! 』
・ I made my own DCDC converter! (2) "Introduction from parts selection to hand assembly! 』
・ I made my own DCDC converter! (3) "Introducing points to note in layout design! 』
・ I made my own DCDC converter! (4) “No way! 』
・ I made my own DCDC converter! (5) “Challenge phase adjustment! 』
・ I made my own DCDC converter! (6) “There is an error between the simulation result and the actual machine! ? 』

・ I made a DC/DC converter using a universal board (1)

・ I tried making a DC/DC converter using a universal board (2)

・ I tried making a DC/DC converter using a universal board (3)

・ I made a DC/DC converter using a universal board (4)

・ Create a power supply with your own printed circuit board! (1)

・ Create a power supply with your own printed circuit board! (2)

・ The path to my first circuit design (2) ~Selection of DC/DC converter~

・ The path to my first circuit design (3) ~DC/DC converter board design~

・ The path to my first circuit design (4) ~ Implementing a DC/DC converter ~

・ The path to my first circuit design (5) ~Evaluation of DC/DC converters~

・ The journey to my first circuit design (6) ~Final episode: Bonus~

・ Line tracing car made from power supply (DC/DC converter specification study)

・ Line tracing car made from power supply (DC/DC converter implementation preparation edition)

■ Device-related articles

・ Intel: Stratix 10 FPGA & SoC Announcement - What is FPGA? ~
・ Overwriting prohibited!? Writing to Flash memory
・ What is FIFO?
・ About SER
・ What are FPGAs?
・ Implementation of ROM RAM FIFO with FPGA built-in memory block?!
・ Mass man's FPGA practice 1 "To operate PLL with high precision (1)"
・ Mass man's FPGA practice 2 "To operate PLL with high precision (2)"
・ I/O function of FPGA - Programmable Current strength - Part 1 -　　
・ I/O function of FPGA - Programmable Current strength - Part 2 -
・ I/O function of FPGA ～Open Drain? Open Collector? Tri-State?～
・FPGA I/O functions ~What is voltage conversion?~
・ I/O functions of FPGA - Voltage conversion with Open Drain!! -

・ Dophy's failure collection ~part 1~

■ Articles related to HDL design

・ Easy description of design! ～ Design Template ～
・ Let's use the IP ~ I want to see the contents of the IP ~
・ Differences between Verilog and VHDL - Difficulties in conversion -
・ Verilog HDL for the first time - Find the cause of Error! ~
・ Differences between synchronous and asynchronous circuits ~Conclusion~
・ Differences between synchronous and asynchronous circuits ~extra edition~
・ How to write a Verilog HDL if statement
・ Enter all conditions in the case statement
・ Verilog HDL
・ frequency divider
・ Differences between VHDL and verilog HDL ~ Signals with different bit widths ~
・ initial value problem
・ Verilog grammar Difference between blocking and non-blocking logic synthesis

■ Articles related to power supply/power consumption

　・EPE で電源選定！
　・複数ある FPGA の電源～それぞれの役割は？
　・複数ある FPGA の電源～電源共有の注意点
　・要注意！電源立ち上げに関する制約
　・選べる！消費電力の見積り方法～PowerPlay Power Analyzer 編～

・ DC-DC converter ～Secret of voltage conversion～
・ The source of electricity, what is a “power supply”!?
・ Which one is better? ～Linear and Switching～

■ Articles related to timing analysis

　・タイミング解析シリーズ1 『タイミング解析の概念』
　・タイミング解析シリーズ2 『SDCファイルってなに？』
　・タイミング解析シリーズ3 『SDC 記述のコマンドを理解！』
　・タイミング解析シリーズ4 『タイミング解析結果はスラック値で表現！』
　・タイミング解析シリーズ5 『パフォーマンスを最適化する1』
　・タイミング解析シリーズ6 『パフォーマンスを最適化する2』
　・タイミング解析フロー ～制約をかけるまで～

■ Transceiver-related articles

・ Transceiver - What is PCI Express gen3 x8? ~

■ Communication-related articles

・ What is communication? Acknowledgment in Wonderland ~Part 1~
・ What is communication? Acknowledgment of Wonderland ~Part 2~

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