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hello.
My immediate goal is to be able to handle FPGAs safely.
Last time, I examined the optional function Current Strength of the IOE output buffer built into Altera's FPGA.
A closer look at this output buffer reveals additional functionality.
I'm ashamed of myself for being satisfied with the Current Strength feature...
This time, I examined Open Drain of FPGA output buffer.
As a new engineer, I first saw the word "Open Drain"...? ? ?
Therefore, Open Drain I tried to find out what it is like.
Open Drain とは
This is the output that is drawn outside without connecting the drain of the FET transistor to anything in the circuit.
Don't connect anything in the circuit... This is the "openness" that I learned in the training!!!
Open Drain … That's right, it's about opening the drain of a FET transistor! Thinking that, when it is open, the voltage is not stable, so it may be high impedance. I made a hypothesis and examined the circuit.
Operation ofOpen Drain
When a Low signal is input to IN, the drain becomes open, so OUT becomes high impedance.
You can see that it is a circuit in which OUT becomes Low when a High signal is input to IN.
When I was satisfied with the meaning of the opening, my senior
“What is the difference between Open Drain, Open Collector and Tri-State? I was asked, so I looked it up.
Open Collector とは
Open Drain opens the drain of the FET transistor,
Open Collector is to open the collector of the bipolar transistor.
Operation ofOpen Collector
The collector of the bipolar transistor is opened and the output becomes high impedance.
What are Tri-States?
Tri-State combines multiple transistors and controls high impedance with the EN signal.
The figure shows a combination of FET transistors.
Tri-Statebehavior
・When EN is Low (red frame in the table)
The EN transistor in the circuit is ON.
The signal input at IN is output as is.
・When EN is High (blue frame in the table)
The EN transistor in the circuit is OFF.
Since OUT is open, the output will be high impedance.
2つの真理値表を比べると
You can see that the impedance is high only when OUT is open.
Tri-State controls high impedance by EN signal.
Here I wondered.
“In the first place, when is high impedance used? 』
今回のまとめ
・ Open Drain means that the drain of the FET transistor is opened and the output becomes high impedance.
・ Open Collector means that the collector of the bipolar transistor is opened and the output becomes high impedance.
・ Tri-State controls high impedance with EN signal.