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HyperLynx PI is a power integrity analysis tool. It can perform DC voltage drop analysis, AC decoupling analysis, and plane noise analysis, making it an effective tool for both pre-analysis before board design and post-analysis using imported PCB data.

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HyperLynx PI is a power integrity analysis tool that can perform DC voltage drop analysis, AC decoupling analysis, and plane noise analysis. It is an effective tool for both pre-analysis before board design and post-analysis using imported PCB data.

Furthermore, it can propose and analyze capacitors necessary for PDN analysis, automate the consideration of capacitor capacitance, chip size, and placement, and reduce verification man-hours.

We regularly hold seminars on this product. Register here!

Introduction video

<Environment construction>

Please refer to this page for instructions on downloading and installing HyperLynx.

How to download the Siemens EDA tool
How to install HyperLynx

<Application for Evaluation License>

If you do not have a license and would like to try HyperLynx PI, please request an evaluation license from us.

Inquiries (evaluation license requests), etc.

Please write "I would like an evaluation license." A representative will contact you.

Functional overview

HyperLynx PDN Capacitor Optimization
[movie]

HyperLynx PI imports Gerber files generated from PCB layout systems such as CAD tools and suggests the optimal capacitor combination to meet the target impedance. This capacitor combination refers to the capacitor capacitance, chip size, and placement, and this automation significantly reduces the time and effort required for design analysis.

<Flow>
① Import Gerber files into HyperLynx PI
② Obtain the optimal solution using Capacitor optimization
③ Decoupling Analysis: Analysis based on the optimal solution
④ If the requirements are not met, lower the target impedance and obtain the optimal solution again, then perform a Decoupling Analysis.

PDN analysis using HyperLynx PI with Intel® Agilex™ F-Series FPGA Development Kit
[movie]

Prior PDN analysis is essential for developing large-scale FPGA-based boards. PDN analysis can be performed using the following flow.

<Flow>
① Open the board design data.
② Select the voltage to analyze and register the names of the capacitors required for the analysis.
③ Review the analysis results and consider combinations of capacitors that satisfy the target impedance.

Related Documents

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Seminar/Workshop

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