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Are there any precautions when outputting the PLL output directly from the user I/O pin?

Clock/PLL

When I assign the user I/O to the PLL output clock and compile, the compilation completes, but I get a warning about the Jitter component.

Output from user I/O will result in lower clock quality compared to dedicated clock output pins. Please refer to the Handbook of each device for information on the jitter component when outputting from each pin.

For Stratix III, see keywords "tOUTPJ_DC", "tOUTCCJ_DC", "tOUTPJ_IO", "tOUTCCJ_IO".

If the above usage does not affect the operation of the board, there is no problem even if it is not the clkout pin.

*For Cyclone III, please refer to the ELS5827 FAQ.

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