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Please tell me how to simulate Example Top Design when generating DDR2 (DDR3) Uni-PHY with Megawizard Plug-In Manager.
Quartus Prime
simulation
Please tell me how to simulate Example Top Design when generating DDR2 (DDR3) Uni-PHY with Megawizard Plug-In Manager.
It uses a Quartus II feature called NativeLink.
Please refer to the document at the URL link below, page 10.
https://www.altera.co.jp/content/dam/altera-www/global/ja_JP/pdfs/literature/hb/external-memory/emi_debug_verify.pdf
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