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I set the Virtual Pin option for an output pin (or bidirectional pin), but it is ignored with the following warning message.

Quartus Prime

<Warning message>
Warning: Ignored Virtual Pin assignment on output enabled pin "signal name"

Quartus II considered the pin logic to be tri-stated (Hi-Z output) as a result of logic synthesis. Therefore, insert an I./O buffer in front of the pin. Altera devices also do not allow Hi-Z connections to internal logic. For these reasons it is not possible to set the Virtual Pin option.

To avoid this warning message, either assign the desired pin to an I/O pin on the device, or reconsider your logic to avoid tristate configurations.

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