Category: External memory interface
Tools: Quartus® Prime
Device: Arria® 10


Please check the following points.

• Check read DBI ON, Check Signal Integrity of DBI signal
• IP default settings may not match your memory or specs
• If the version of Quartus® Prime is a little old, you may not be able to set the speed grade and AC level of the used memory. The IP setting value is set to the closest setting and the error is individual judgment. (Example: AC level 10mV is converted to tIS/tIH 10ps)
• If the ALERT# pin placement setting in the Memory tab is "Auto..", the placement is up to the tool. Please pay attention to the board design
• Set the OCT/ODT values of Memory I/O and FPGA I/O to the optimum settings determined by board simulation.
• Board tab settings should reflect timing-related elements such as layout delay and simulation waveform slope as much as possible.
• If you think the EMIF toolkit is necessary for dealing with defects or evaluating the margin of the actual device, turn it on in the Diagnostics tab.