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Intel: The following warning appears for the DQ signal of SDRAM Controller Intel FPGA IP. How should I deal with this?
<Warning message>
Warning (14632): Output pin "<DQ pin signal path>" driven by bidirectional pin "<DQ signal name>" cannot be tri-stated File: <File name>
Category: External memory interface
Tools: Quartus Prime
Device: Cyclone® V
When I monitor DQ pin signal with Signal Tap, I get this kind of warning.
Therefore, if you want to monitor a bidirectional signal such as a DQ pin signal with SignalTap, monitor the input side register and the output side register that are connected to the bidirectional signal.
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