Narrow down by specifying conditions
There are currently 4292 hits.
Intel: How can I reduce the area and processing time of circuits implemented in FPGA with OpenCL™?
Category: OpenCL™
Tool: Intel® FPGA for OpenCL™
Device: Arria® V
Performance optimization should start by analyzing what lines of code are spending time in the current code.
Intel® FPGA for OpenCL™ has a tool called Profiler, so use it.
There is also a tool called area report for area optimization, and you can check how much resources are being used on which line, so use this to consider optimizing areas that consume a lot of resources.
■ How to use area reports
$ aoc -v -c -g fast.cl // fast.aoco is generated
$ aocl analyze-area fast.aoco // fast.aoco-area-report.html is generated, so check it with a browser
■ How to use Profiler GUI
$ aoc v -g --report --profile xx.cl -o xx.aocx --board a5soc_sharedonly
Experienced FAE
Free consultation is available.
From specific product specifications to parts selection, the Company FAE will answer your technical concerns free of charge. Please feel free to contact us.