Product Summary
SiTime offers a wide range of high-performance clock buffers supporting a wide range of frequencies and input/output types (single-ended/differential output).
The jitter added to the input clock (Additive Phase Jitter) is low and the skew between outputs is low, making it ideal for products that are sensitive to jitter.
Additionally, its low power consumption makes it ideal for battery-powered, high-density applications.
You can choose from "High Performance Buffer", "For PCIe Gen", and "AEC-Q100 Compliant, For Automotive".
★Benefits offered ⇒ "Easy output setting" "Reduction in board area" "Reduction in number of components"
others, Built-in high-performance MEMS resonator clock generator or Jitter cleaner/network synchronizer ofWe also have a lineup.
Recommended for such applications
Ideal for applications that require multiple clock sources and synchronization, such as:
・PCIe Gen 1~6
・FA camera
・Broadcasting equipment (switchers, camcorders, system cameras, etc.)
・Industrial equipment that drives multiple microcontrollers/FPGAs/SoCs
High performance clock buffer
A lineup of clock buffers for low jitter, high frequency clock/data distribution.
It also supports PCIe (Gen1 to 5).
| type name | Number of inputs | Number of outputs | Supported frequencies (Max) | Skew(Max) | Additive Phase Jitter | Package size (mm) |
| SiT92110 | 1 | 10 (single ended) |
250 MHz |
30 ps |
50 fs |
5.0×5.0(32-pin QFN) |
| SiT92112 |
1 |
2 (single ended) |
200 MHz |
50 ps | 50 fs | 2.0×2.0(8-pin DFN) |
|
1 |
5 (single-ended) |
250 MHz |
30 ps | 50 fs | 4.0×4.0(24-pin QFN) | |
| SiT92114 |
1 |
4 (single ended) |
200 MHz |
50 ps | 50 fs |
2.0×2.0(8-pin DFN) 3.0 x 4.4(8-pin TSSOP) |
| SiT92211 |
1 |
10 (differential) |
2.1 GHz |
30 ps | 55 fs | 7.0×7.0(48-pin QFN) |
| SiT92216 |
1 |
1 (single-ended) 4 (differential) |
2.1 GHz |
30 ps | 50 fs | 5.0×5.0(32-pin QFN) |
Clock Buffer for PCIe
This clock buffer is also compliant with PCI-Express Gen 6. It supports HCSL/LP-HCSL input and output.
| type name | Number of inputs | Number of outputs | output | Supported frequencies (Max) |
Skew(Max) |
Additive Phase Jitter(rms) |
Package size (mm) |
| SiT92310 | 1 | 20 (differential) |
LP-HCSL |
400 MHz |
50 ps |
8 fs |
10.0×10.0(72-pin QFN) |
| SiT92313 |
1 |
8 (differential) |
LP-HCSL |
400 MHz |
50 ps |
8 fs | 6.0×6.0(48-pin LGA) |
|
1 |
4 (differential) |
LP-HCSL |
400 MHz |
50 ps |
8 fs | 5.0×5.0(32-pin VQFN) | |
| SiT92315 |
1 |
20 (differential) |
LP-HCSL |
400 MHz |
50 ps |
8 fs | 6.0×6.0(80-pin LGA) |
| SiT92316 |
1 |
6 (differential) |
LP-HCSL |
400 MHz |
50 ps |
8 fs | 5.0×5.0(40-pin VQFN) |
| SiT92317 |
1 |
6 (differential) |
LP-HCSL |
400 MHz |
50 ps |
8 fs | 5.0×5.0(40-pin VQFN) |
| SiT92318 |
1 |
8 (differential) |
LP-HCSL |
400 MHz |
50 ps |
8 fs | 6.0×6.0(48-pin VQFN) |
AEC-Q100 compliant, automotive clock buffer
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