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Product Summary
Parade Technologies DisPlayPort™ / eDP to LVDS converter products are DisplayPort™ to LVDS converters designed for PCs that utilize GPUs with DisplayPort™ (DP) or Embedded DisplayPort™ (eDP) outputs and display panels that accept LVDS inputs. This is a converter to .
Product main features
- Enables use of LVDS display panels with DisplayPort™ or eDP™ video source devices
- Supports up to 1680×1050@60Hz with 18-bit color depth (PS8620, PS8622)
- Supports up to 1920×1200@60Hz with 18-bit color depth (PS8623)
- Supports up to 1920×1200@60Hz with 24-bit color depth (PS8625)
Product lineup
PS8620
A DisplayPort™ to LVDS converter designed for PCs that utilize GPUs with DisplayPort™ (DP) or Embedded DisplayPort™ (eDP) output and display panels that accept LVDS input. Appears as a DP or eDP sink device to a video source and acts as an LVDS source device to an LVDS display panel. A fully integrated solution that requires no external CPU, memory, clock reference, or voltage regulator.
It can also be configured to read the EDID from the display DDC channel. Provides display panel power-up sequence and backlight control, including PWM generation. The backlight characteristics can be controlled by the video source on the DP AUX channel using the eDP v1.2 DPCD control register. Alternatively, the video source can provide a backlight control signal to the PS8620 and gate the signal for the panel power-up sequence, or the source can bypass the device and directly control the panel backlight.
■ Features & block diagram
●General features
・DisplayPort™ or eDP™ video source device
Can use LVDS display panels
・Supports up to 1680×1050@60Hz with 18-bit color depth
・CrystalFree: No external crystal or clock required
・Dual power supply configuration: 3.3V or 2.5V for I/O, 1.35V or 1.2V for core
・Supports firmware-less operation and hardware pin configuration
・Optional I2C slave interface for chip control
・Operating temperature range: -20℃ to 70℃
・7x7mm 48-pin QFN package (halogen-free, RoHS compliant)
・ESD: 8kV (HBM)
●DisplayPort™ input
・Compliant with VESA® DisplayPort™ 1.1a
・Supports 18, 24, 30 bpp RGB color format input
・Compliant with VESA🄬 eDP 1.2, with AUX compatible backlight control
・Supports 1 lane main link configuration
・1.62Gbps and 2.7Gbps link speeds
・Supports various GPU-specific power management protocols
- Supports all eDP display authentication schemes including ASSR
・Supports SSC 0.5% downspread
・Supports full link training, fast link training, and no link training
●LVDS interface
・Single link LVDS output, clock speed up to 135MHz
・Supports up to 1680×1050@60Hz with 18-bit color depth
・LVDS spread spectrum clocking up to 2%
・Supports LCD panel power sequence control
■ Target applications
・All-in-one PC
·notebook
·Tablet
PS8622
A DisplayPort™ to LVDS converter designed for PCs utilizing GPUs with DisplayPort™ (DP) or Embedded DisplayPort™ (eDP) output and display panels that accept LVDS input. Appears as a DP or eDP sink device to video sources and acts as an LVDS source device to LVDS display panels. A fully integrated solution that requires no external CPU, memory, clock reference, or voltage regulator.
It can also be configured to read the EDID from the display DDC channel or from an optional external ROM (provided by the I2C master) connected to the PS8622. External ROM can also contain configuration code to customize device behavior and interface timing. Provides display panel power-up sequence and backlight control, including PWM generation. The backlight characteristics can be controlled by the video source on the DP AUX channel using the eDP v1.2 DPCD control register. Alternatively, the video source can provide a backlight control signal to the PS8622 to gate the signal for the panel power-up sequence, or the source can bypass the device and directly control the panel backlight. .
■ Features & block diagram
●General features
・DisplayPort™ or eDP™ video source device
Can use LVDS display panels
- Supports up to 1680×1050@60Hz with 18-bit color depth or 1440×900@60Hz with 24-bit color depth
・CrystalFree: No external crystal or clock required
- Operates from a single 3.3V or 2.5V power supply and achieves low power consumption of less than 250mW for typical applications
・Dual power supply configuration: 3.3V or 2.5V for I/O, 1.35V or 1.2V for core
・Supports firmware-less operation, hardware pin configuration or initial code configuration
Optional I2C master for external EEPROM initial code loading and device configuration
・Optional I2C slave interface for chip control
・Operating temperature range: -40℃ to 85℃
・4.5×6.5mm 46-pin and 7×7mm 48-pin QFN package options (Halogen-free, RoHS compliant)
・ESD: 8kV (HBM)
●DisplayPort™ input
・Compliant with VESA® DisplayPort™ 1.1a
・Supports 18, 24, 30 bpp RGB color format input
・Equipped with HDCP1.3 decryption engine with built-in HDCP key ROM
・Compliant with VESA🄬 eDP 1.2, with AUX compatible backlight control
・Supports 1 lane main link configuration
・1.62Gbps and 2.7Gbps link speeds
・Supports various GPU-specific power management protocols
- Supports all eDP display authentication schemes including ASSR
・Supports SSC 0.5% downspread
・Supports full link training, fast link training, and no link training
●LVDS interface
・Single link LVDS output, clock speed up to 135MHz
- Supports up to 1680×1050@60Hz with 18-bit color depth or 1440×900@60Hz with 24-bit color depth
・LVDS spread spectrum clocking up to 2%
・Supports LCD panel power sequence control
■ Target applications
・All-in-one PC
·notebook
·Tablet
PS8623
A DisplayPort™ to LVDS converter designed for PCs utilizing GPUs with DisplayPort™ (DP) or Embedded DisplayPort™ (eDP) output and display panels that accept LVDS input. Appears as a DP or eDP sink device to video sources and acts as an LVDS source device to LVDS display panels. A fully integrated solution that requires no external CPU, memory, clock reference, or voltage regulator.
It can also be configured to read the EDID from the display DDC channel. Provides display panel power-up sequence and backlight control, including PWM generation. The backlight characteristics can be controlled by the video source on the DP AUX channel using the eDP v1.2 DPCD control register. Alternatively, the video source can provide a backlight control signal to the PS8623 to gate the signal for the panel power-up sequence, or the source can bypass the device and directly control the panel backlight. .
■ Features & block diagram
●General features
・DisplayPort™ or eDP™ video source device
Can use LVDS display panels
・Supports up to 1920×1200@60Hz with 18-bit color depth
・CrystalFree: No external crystal or clock required
・Dual power supply configuration: 3.3V or 2.5V for I/O, 1.35V or 1.2V for core
・Supports firmware-less operation and hardware pin configuration
Optional I2C master for external EEPROM initial code loading and device configuration
・Optional I2C slave interface for chip control
・Operating temperature range: -20℃ to 70℃
・7x7mm 48-pin QFN package (halogen-free, RoHS compliant)
・ESD: 8kV (HBM)
●DisplayPort™ input
・Compliant with VESA® DisplayPort™ 1.1a
・Supports 18, 24, 30 bpp RGB color format input
・Compliant with VESA🄬 eDP 1.2, with AUX compatible backlight control
・Supports 1-lane or 2-lane main link configurations
・1.62Gbps and 2.7Gbps link speeds
・Supports various GPU-specific power management protocols
- Supports all eDP display authentication schemes including ASSR
・Supports SSC 0.5% downspread
・Supports full link training, fast link training, and no link training
●LVDS interface
・Single or dual link LVDS output, clock speed up to 135MHz
・Supports up to 1920×1200@60Hz with 18-bit color depth
・LVDS spread spectrum clocking up to 2%
・Supports LCD panel power sequence control
■ Target applications
・All-in-one PC
·notebook
·Tablet
PS8625
A DisplayPort™ to LVDS converter designed for PCs utilizing GPUs with DisplayPort™ (DP) or Embedded DisplayPort™ (eDP) output and display panels that accept LVDS input. Appears as a DP or eDP sink device to video sources and acts as an LVDS source device to LVDS display panels. A fully integrated solution that requires no external CPU, memory, clock reference, or voltage regulator.
It can also be configured to read the EDID from the display DDC channel or from an optional external ROM (provided by the I2C master) connected to the PS8625. External ROM can also contain configuration code to customize device behavior and interface timing. Provides display panel power-up sequence and backlight control, including PWM generation. The backlight characteristics can be controlled by the video source on the DP AUX channel using the eDP v1.2 DPCD control register. Alternatively, the video source can provide a backlight control signal to the PS8625 to gate the signal for the panel power-up sequence, or the source can bypass the device and directly control the panel backlight. .
■ Features & block diagram
●General features
・DisplayPort™ or eDP™ video source device
Can use LVDS display panels
・Supports up to 1920×1200@60Hz with 24-bit color depth
・CrystalFree: No external crystal or clock required
・Single 3.3V or 2.5V power supply: 1920×1200@60Hz, low power consumption of less than 400mW at 24 bits per pixel
・Dual power supply configuration: 3.3V or 2.5V for I/O, 1.35V or 1.2V for core
・Supports firmware-less operation, hardware pin configuration or initial code configuration
Optional I2C master for external EEPROM initial code loading and device configuration
・Optional I2C slave interface for chip control
・Operating temperature range:
- Commercial: -20℃ to 70℃
- Industrial: -40℃ to 85℃
・7x7mm 56-pin QFN package (halogen-free, RoHS compliant)
・ESD: 8kV (HBM)
●DisplayPort™ input
・Compliant with VESA® DisplayPort™ 1.1a
・Supports 18, 24, 30 bpp RGB color format input
・Equipped with HDCP1.3 decryption engine with built-in HDCP key ROM
・Compliant with VESA🄬 eDP 1.2, with AUX compatible backlight control
・Supports 1-lane or 2-lane main link configurations
・1.62Gbps and 2.7Gbps link speeds
・Supports various GPU-specific power management protocols
- Supports all eDP display authentication schemes including ASSR
・Supports SSC 0.5% downspread
・Supports full link training, fast link training, and no link training
●LVDS interface
・Single or dual link LVDS output, clock speed up to 135MHz
・Supports up to 1920×1200@60Hz with 18 or 24-bit color depth
・LVDS spread spectrum clocking up to 2%
・Supports LCD panel power sequence control
■ Target applications
・All-in-one PC
·notebook
·Tablet
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