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What is DSP Builder?
This tool allows you to design and simulate digital signal processing (DSP) systems using MATLAB/Simulink and then generate hardware description (HDL) code for Altera ® FPGAs.
Major features
・Simulink-based design
- DSP algorithms can be designed by combining blocks in Simulink
- Development is possible with an intuitive GUI
・Automatic HDL code generation
- Convert the designed DSP system into HDL (VHDL/Verilog) for FPGA
- Integration with Quartus® Prime for smooth FPGA implementation
・Hardware optimization
- Efficient design using pipeline configuration and parallel processing suitable for FPGAs
- Leverages Altera ® FPGA DSP blocks (e.g. hardware multipliers and adders)
・Hardware-in-the-loop (HIL) simulation
- Simulation using the actual FPGA is possible on Simulink
- Efficient design and verification