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The origin of the SiC cascode JFET and its evolution into the perfect switch: Unique uses in real applications

Overview

High-frequency switches using wide bandgap semiconductors contribute to the efficiency of power conversion. Silicon carbide switches, for example, can be implemented as SiC MOSFETs or as SiC FETs in a cascode configuration.

This article traces the origins of SiC FETs, their evolution to the latest generation, and compares their performance with other technologies. In four installments, I will discuss the differences in physical characteristics, approaches and features for ideal switches, reliability, and unique uses in real-world applications.

Other SiC Cascode JFET Applications

SiC cascode JFETs are suitable for high efficiency power converters and are available up to 1700V ratings for typical industrial three-phase applications. The cascode principle can be easily extended by "stacking" SiC JFETs with a controlling Si MOSFET (Figure 1). A module demonstrating this principle has been developed rated at 40kV.

Figure 1: High voltage rating of several tens of kV is supported by the principle of stacked cathodes
Figure 1: High voltage rating of several tens of kV is supported by the principle of stacked cathodes

As mentioned earlier, SiC JFETs have a nearly constant saturation current vs. gate-source-drain voltage characteristic that can be advantageously used for circuit protection applications such as current limiters and breakers. Figure 2 shows the concept of a self-biased circuit protector using SiC cascode JFETs. This circuit protector is truly "two terminal" with no need for an external auxiliary power rail or an internal DC-DC converter.

Figure 2: Two-terminal self-biased circuit protector concept
Figure 2: Two-terminal self-biased circuit protector concept

Progress towards improving performance and value

SiC cascode JFETs have undergone successive generations, with the latest GEN4 offering various improvements including usable voltage range, cell density to improve on-resistance, and die sintering to improve thermal performance. In addition, the channel resistance is very low, so conduction losses through the substrate are the limiting factor, and techniques to thin the substrate are used. In addition, the dynamic aspects have been improved, especially the output capacitance COSS. This reduces losses in hard-switched continuous conduction mode such as totem-pole PFC, and enables high-frequency operation in soft-switched resonant circuits such as LLC and PSFB.

Switching edge rates are now so fast that devices are offered with ratings of "ultrafast" or even just "fast" which is intentionally slowed down to suit applications where edge rate is not critical to performance and may cause EMI or failure issues such as motor drives. Packaging has also evolved from the original SiC cascode JFETs, where Si MOSFET and SiC FET dies are placed side-by-side and wire-bonded to each other. This allows for flexibility in packaging such as the TO-247 package, but to achieve higher performance at lower cost, "stacked" die arrangements using larger dies to carry higher currents are becoming more common, especially when paralleling components in compact modules.

Also, solder die attach is changing to silver sinter for improved thermal performance, and the DFN8x8 package allows for a low inductance high frequency layout for MHz switching. TO-220, TO-247 and D2PAK packages remain popular as SiC cascode JFETs can be retrofitted into older designs using IGBTs. The "Kelvin" source connection on the 4-lead versions of these packages mitigates issues with source lead inductance interfering with the gate drive loop. Also, electrical performance is driving the value of using SiC cascode JFETs, as well as cost reduction programs due to continued production yield improvements and the move to 8-inch wafers.

An attractive solution: SiC cascode JFET

The latest generation of SiC cascode JFETs brings us that little bit closer to the ideal switch, enabling high frequency power conversion stages with the lowest conduction and dynamic losses ever achieved, and greater than 99% efficiency, with the attendant energy, size and weight savings. Designers are expanding their definition of "ideal" to also require stable characteristics over a wide range of operating and fault conditions, and easy to drive in convenient packages.

At the same time, equipment end users are demanding reliable end products at a total lifetime cost that is a step up from older technology implementations. ON Semiconductor's SiC cascode JFETs make this possible with a range of parts with voltage ratings from 650V to 1700V and on-resistances down to 7mΩ.

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