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This Quartus® Guide series is for users of the Intel® Quartus® Prime / Quartus® II development software.

See here for FPGA/CPLD development flow.

explanation

This document can be used as a reference in the "5. Constraint Setting" phase of FPGA/CPLD development.

Introduces how to set commonly used pin options in the Quartus® Prime / Quartus® II development software.

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Use the Assignment Editor and Pin Planner in the Quartus ® Prime / Quartus ® II development software to set pin options when you want to assign a specific function to a pin or an internal signal.

Document

ELS1413_Q1510_21__1.pdf

"Quartus Prime - How to Set Commonly Used Pin Options ver.15.1" (Document for tool version: Ver 15.1)

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Intel® FPGA Development Flow/FPGA Top Page

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