Qorvo: Given the smaller die size of SiC JFETs, how is avalanche capability managed compared to SiC MOSFETs?

In fact, the Eas capability of SiC devices depends on the die size. However, in practical applications, more important is the device's ability to handle the high peak currents of low-energy avalanches that can occur during lightning strikes and other extreme stress events on AC lines. Qorvo's SiC cascode FETs excel in this area.

This is because the JFET has a mechanism to handle avalanche by going into active mode. Extremely high avalanche current densities can be safely handled in cyclic mode without changing device parameters or capacitance, far superior to conventional SiC MOSFETs where the gate oxide can be affected. increase.

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