Intel: The power consumption of devices that do not have a built-in Hard Memory Controller (HMC) for Cyclone® V SoC is estimated using the Early Power Estimator (EPE) sheet. If I use the DDR SDRAM controller on the Hard Processor System (HPS), do I need to add pins to connect to DDR on the IO sheet?

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Intel: Early Power Estimator (EPE) sheet provides power estimation for devices without Hard Memory Controller (HMC) for Cyclone® V SoC. When using the DDR SDRAM controller on the Hard Processor System (HPS) side, do I need to add pins to connect with DDR on the IO sheet as well?

Cyclone IP SoC FPGA power consumption and heat

Category: Power consumption/Heat
Tools: Others
Device: Cyclone® V

It is only necessary to fill in the HPS sheet, and it is not necessary to fill in the IO sheet.
In the HPS sheet, you can confirm that the Total HPS Power fluctuates by modifying the SDRAM transfer rate and Data Width.

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