By combining the core technologies of embedded electronic device design, such as FPGAs, microcomputers, high-speed interfaces, image processing, and software, we provide customers with easy-to-use and ready-to-use solutions.
Odyssey Demo Show Case (1) MAX10 Kit
The Mpression Odyssey MAX®10 kit is an evaluation kit that uses an Intel® MAX10 FPGA and Broadcom's Wiced SMART BLE module, and is an epoch-making evaluation and development kit that controls FPGAs and sensors with smartphones via Bluetooth®.
In this demo, you can see how the MAX10 FPGA features two built-in configuration areas that can be switched from a smartphone to instantly activate another FPGA design.
Sodia Demo Show Case (1)
Using the Mpression Sodia board, introduced two types of demos using video conversion and OpenCL.
Build a demo based on the image of an embedded panel computer by connecting an SDI daughter board, LVDS daughter board, and DVI monitor to the Sodia board. Camera input images and system images are output in real time to a DVI monitor and operation screens to an LVDS liquid crystal panel. We are also porting a demo that accelerates the calculation of the Mandelbrot set using OpenCL with FPGA. By consolidating these various elemental technologies, it is possible to support any application, and it can be applied to various systems such as object detection, video surveillance, and autonomous driving support, enabling algorithm development and verification for a wide range of applications.
Sodia Demo Show Case (2) Real time image clarifying IP Demo
Using the Mpression Sodia board, we built an image sharpening demo that implemented ZENIC 's image sharpening IP core (FogFine).
In this demonstration, a DVI daughter card is connected to the Sodia board, and images of nighttime (ultra-low illumination), backlight, and fog where visibility is especially low are input to the Sodia board, and images that have undergone image sharpening processing in real time are monitored. is outputting to
By implementing the FogFine IP core in the Cyclone® V SoC, parallel processing of network communication by SoC and image sharpening by FPGA can be realized on a single chip, making it possible to apply it to various surveillance camera solutions.
This demo design is built by Generic.
Sodia Demo Show Case (3) Low Latency Warping demo
Using the Mpression Sodia board, we built a low-latency Warping demo that implemented TAKUMI 's distortion correction IP core TW200. In this demo, a 100BAE-T1 HSMC card equipped with a 2M pixel camera module is connected to the Sodia board, and the input Full-HD camera image is corrected in real time with a low delay of 3 ms to 8.3 ms for distortion correction, keystone correction, and inversion. , Barrel shape conversion, enlargement, reduction, tilt, etc., and output the processed image to an external monitor.
By implementing this distortion correction IP core TW200 in Cyclone® V SoC, it can be used for consumer, FA, and automotive applications such as projectors, digital signage, surveillance and business cameras, electronic mirrors, HUD (Head Up Display), and in-vehicle information terminals. It can be applied to various systems and enables development and verification of a wide range of applications. (This demo design is built by TAKUMI.)
More information is posted on Rocketboards.
Sodia Demo Show Case (4) QuickBoot
We installed Ubiquitous's QuickBoot R2.0 on the Mpression Sodia board and built a demo that boots up the FPGA's built-in CPU at high speed.
In this video, you can see a demo of Ubuntu booting in just 3.5 seconds after turning off the Mpression Sodia board.
QuickBoot is a boot technology originally developed by Ubiquitous, Inc. It is an original software product that boots in a few seconds from the power-off state without depending on the amount of memory used by the application side, ready for use by the user.
By combining Intel® Cyclone® V SoC and Ubiquitous QuickBoot, we can improve start-up time and standby power consumption in a wider range of markets, including automotive equipment, multifunction devices, office equipment such as projectors, FA/industrial equipment, broadcasting equipment, and medical equipment. We can help you solve your problems.
Helio Demo Show Case (1) Network camera server demo
Using the Mpression Helio board, it is possible to display video upscaled from HD size to full HD size while streaming video captured by a USB camera (HD size) via a server.
By enlarging the image from 720p to 1080p in the FPGA block, the load on the CPU is reduced, image output processing is smoothed, and smooth image processing with little processing delay is realized. Reference designs and more information can be found at Rocketboards.
(This demo design is built by DSN partner Apollo Giken)
Helio Demo Show Case (2) Helio Xwindow system demo
This is a demo that uses the Mpression Helio board and Helio View, uses the Xwindow system for Linux, and builds an LXDE desktop environment. By utilizing this reference design, it is possible to quickly introduce Linux embedded devices and build a desktop environment. . Reference designs and more information can be found at Rocketboards.
(This demo design is built by DSN partner Kondo Electronics)
Helio Demo Show Case (3) Human Recognition demo
Using the Mpression Helio board, it is possible to detect people (upper body) in the image input from DVI and draw a rectangle for the detection points. The maximum number of human detection points is 10, and the target image is DVI input 720p (60fps). The FPGA block performs image input/output and rectangle drawing processing, and the HPS block performs human recognition processing. (This demo and reference design uses still images to detect people and objects, but it is technically possible to support moving images as well.)
Reference designs and more information can be found at Rocketboards. (This demo design is built by Dynasystem)
Helio Demo Show Case (4) Multi-channel PWM Demo
Build a PWM 10-channel control application using the Mpression Helio board.
The rotation speed of each channel is monitored by Linux, and the PWM duty settings for 10 fans can be set in increments of 0.05% using the FPGA fabric, making it possible to control the fan rotation speed.
Reference designs and more information can be found at Rocketboards. (This demo design is built by DSN partner NDR)
Helio Demo Show Case (5) 2D Graphics Demo
Using the Mpression Helio board, built a 2D graphics demo that implemented the graphic IP core ant200 made by Digital Media Professionals.
The ant200 boasts the world's smallest logic size, and by implementing it on the Intel® SoC FPGA, it realizes a low-cost and rich user interface. In addition, since it supports vector graphics, it is especially suitable for drawing maps and character data on various displays with different sizes.
Reference designs and more information can be found at Rocketboards. (This demo design is built by DSN partner Digital Media Professionals)
Helio Demo Show Case (6) Haze Reduction Demo
Using the Mpression Helio board, we implemented the image processing IP core Haze Reduction made by Japan Systemware.
In this demo, the input image is processed in real time with Haze Reduction IP to remove haze and fog and sharpen the image.
By implementing Haze Reduction, Linux applications process image recognition such as object detection in parallel with haze removal processing, making it ideal for image recognition solutions such as surveillance cameras.
Reference designs and more information can be found at Rocketboards. (This demo design is built by Nihon Systemware Co., Ltd.)
Helio Demo Show Case (7) Warping Engine IP Demo
Using Mpression Helio board, TAKUMI's distortion correction IP core TW100 was implemented.
In this demonstration, a camera with a 180° fisheye lens is connected to the Helio board, and the input image is corrected for distortion, panorama conversion, and image cropping in real time and output to the monitor.
The highly flexible image conversion function of the TW100 is compatible with systems that require high-resolution images and high performance such as 60fps. It can be applied to various systems such as Head-Up Display) and HMD (Head-Mounted Display) projectors.
Demo designs and more information can be found on Rocketboards. (This demo design is built by TAKUMI)
Beryll Demo Show Case (1) USB 2.0 480p Video Isochronous demo
Using the Mpression Beryll board, we have achieved 480p video transfer over USB 2.0. The video source input to the Microtronix HDMI daughter card is taken into the FPGA, and after image processing by the scaler IP designed by Macnica inside the FPGA, it is passed through the bridge circuit for Cypress's USB2.0 controller IC "EZ-USB® FX2" and finally converted to USB2.0 through FX2.
In addition, the USB software utilizes the USB 2.0 Video Class created by Macnica, achieving 480p isochronous transfers.
Hydra Demo Show Case (1) Mutil Panel Interface demo
Using the Mpression Hydra board, it is possible to realize not only the conventional panel interface LVDS, but also new high-resolution panel interfaces such as eDP (Embedded DisplayPort) and MIPI, which are not supported by existing SoCs, on the same FPGA. The platform makes it possible.
LVDS is output directly from the FPGA, eDP uses Intel® IP to achieve full HD, and MIPI uses Northwest Logic IP to achieve HD resolution. In addition, Intel® image processing IP is used for these image processing. (Click here for an example of image processing IP implementation)
Hydra Demo Show Case (2) HD camera surround view demo
Surround View demo system is configured by connecting 4 cameras to a truck model using Mpression Hydra board. Using an HD camera with about three times the resolution of conventional NTSC and VGA cameras, it is possible to realize a Surround View system with high-definition images. In addition, the fisheye correction of each camera and image composition in Top View are realized with FPGA 1Chip.
MIPI Show Case (1) D-PHY DSI HD LCD Panel demo
MIPI DSI panel output is realized by using Mpression Hydra board connected to Mpression MIPI DSI LCD Card.
The video source input through the DVI installed in the MIPI DSI LCD Card is converted to V-by-One®HS and sent to the FPGA through the V-by-One®HS IP implemented in the FPGA on the Hydra board. is captured. The image is rotated by 90 degrees inside the FPGA, processed by Northwest Logic's MIPI D-PHY DSI IP, and output to the LCD panel via Meticom's MIPI D-PHY DSI transmitter.
Also available is a MIPI DSI LCD Card reference design for the Mpression Nitro board.
Nitro Demo Show Case (1) 4K2K Upscaling demo
Using the Mpression Nitro board, the DVI 1080p (1920 x 1080 60fps) input signal is upscaled by 4 using Intel® image processing IP (Video IP Suite) Scaler, and 4K2K video is displayed on four monitors. This is a demo system that outputs (3840 x 2160 60fps). For image output, a serial high-speed transceiver V-By-One® HS is used, and a separate board converts V-By-One® HS to DVI output.
Nitro Demo Show Case (2) Video Cross Conversion demo
Using the Mpression Nitro board, two independent 3G-SDI 1080p (1920 x 1080 60fps) input signals are converted to HDMI and DVI video formats and output to two monitors.
This Cross Conversion uses Intel® image processing IP (Video IP Suite) for video conversion. The blocks that make up the Video IP Suite are connected by Avalon-ST, making it possible to easily control video switching and mixing depending on the combination.
Nitro Demo Show Case (3) IF.HOTARU Demo
This is a high-speed optical transmission solution that combines Mpression's IF.HOTARU IP core and Intel® FPGA. In this demonstration, uncompressed video data from an optical link compatible camera is received by a Mpression Nitro board (with Intel® Cyclone® V GX) via an optical cable of 20m or longer.
IF.HOTARU is a technology standardized by the IF.HOTARU Interface Consortium as a simple and scalable open protocol technology for point-to-point data transfer. The target bandwidth is from 3.125 Gbps to over 100 Gbps, and the fields of application are not limited to machine vision, but also imaging equipment such as video equipment, commercial printers, semiconductor-related equipment, medical image diagnostic equipment, science and technology equipment, wireless equipment, and radar. It can be used for a wide range of purposes, including non-image areas such as equipment and various measuring instruments.
Nitro Demo Show Case (4) 6ch Surround View Demo
Using the Mpression Nitro board, the Surround View demo system is configured by connecting 6 cameras to a crane model. The general Surround View has 4 cameras, but it uses 6 cameras for large and special vehicles, and an HD camera with about 3 times the resolution compared to conventional NTSC or VGA cameras. is used, it is possible to realize a Surround View system with high-definition images. In addition, this demo configuration can be applied not only to Surround View but also to surveillance camera systems.
Nitro Demo Show Case (5) Multi Channel DMA demo
Using Mpression Nitro board and Embedded card, we implemented Systech Co., Ltd.'s SYPCIE (DMA controller corresponding to PCI Express Hard IP Block of Intel FPGA). The PC and the Nitro board are connected with a cable PCI Express through the Embedded card. The Nitro board is equipped with a Cyclone V SoC with a built-in PCI Express Hard IP Block, and a DMA Controller is implemented after the Hard IP Block. You can use the effective rate measurement tool installed on your computer to see the read/write performance when you increase the number of DMA channels.
Ethernet AVB Demo Show Case (1) Audio demo
Ethernet AVB IP is used in Cyclone® IV E-equipped DE-2 to realize audio demos for Ethernet connections, which are needed not only between media devices but also for in-vehicle devices. In this demo video, the DE-2 connected via a switch is compatible with IEEE802.1AS (synchronization guarantee) and IEEE802.1Qav (stream relay method), and 7-segment LED is used together with audio data transfer. Synchronization can be confirmed using the visibility of .
Ethernet AVB Demo Show Case (2) Video transmission demo with time synced
By using the IP core of CC-Link IE Field for Intel FPGA developed by Altima, together with the industrial Ethernet license system provided by Intel®, it is possible to broaden the FPGA-based industrial Ethernet protocol. be able to respond.
By implementing this IP core, which has the same function as the CC-Link IE Field dedicated ASIC CP-220, in Terasic's Industrial Networking Kit equipped with Cyclone® IV E, verification of CC-Link IE Field on FPGA is possible. It will be possible. In this demo, you can see how communication is normal by checking the Link up status and topology change on MITSUBISHI ELECTRIC Corporation 's GX Works2 software. In addition, this IP has passed the conformance test for the first time as an IP for FPGA.