Intel Agilex® 7 F-series FPGAs & SoCs enable 100G Ethernet and more with built-in transceivers.

This video provides a quick introduction to the Intel Agilex®7 F Series FPGA & SoC built-in Ethernet block and useful debugging tools.

[Duration] 1 minute 57 seconds / [Video release date]2021/01/21

Introducing the Intel Agilex® 7 F Series FPGA & SoC transceiver and debug tool "Transceiver Toolkit".
Also see a demonstration of the Transceiver Toolkit using the Intel Agilex® 7 F-Series FPGA Development Kit.

[Duration] 4 minutes 6 seconds / [Video release date] 2021/02/12

An overview of the Intel Agilex® 7 F-Series FPGA & SoC transceiver tiles and the P-tile transceiver architecture used in the PCI Express protocol.
In addition, we will introduce the execution results of PCIe DMA transfer using the Intel Agilex® 7 F series FPGA development kit.

[Duration] 4 minutes 34 seconds / [Video release date]2021/01/26

We will introduce "P-Tile Debug Toolkit", a PCI Express debugging tool for Intel Agilex® 7 F series FPGA & SoC, and actual machine operation at Gen4 (16 Gbps).

We also measured the Eye Pattern during operation with a differential probe soldered on the board, so please take a look at the results.

[Duration] 8 minutes 29 seconds / [Video release date] 2021/10/04

Here are the results of a connection test between the Intel Agilex® 7 F Series FPGA Development Kit and a PCIe Gen4 Rate compatible Desktop PC (Intel® CPU).
It also shows the results of executing DMA transfers using the Example Design with the Avalon-MM interface configuration.

[Published] 2022/04/01

Introduces transceivers built into Intel Agilex® 7 I-series FPGAs & SoCs. Among them, this video focuses on the F-tile transceiver, and not only introduces the overview, but also provides a simple explanation of the transceiver implementation procedure, transceiver performance using the transceiver toolkit, and evaluation results of 400G Ethernet and SDI. to introduce.

[Duration] 7 minutes 47 seconds / [Video release date] 2022/06/24

Introducing a demonstration of PCIe Gen4 x16 Performance Design using the Intel Agilex® 7 F Series FPGA Development Kit.
We also have transfer performance results using a highly efficient DMA circuit, so please take a look.

[Published] 2023/06/06

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We will introduce an example of using F-tile JESD204B Intel® FPGA IP to check the connection between Intel Agilex® 7 FPGA and Analog Devices' high-speed A/D converter AD9083. The AD9083 configuration uses Nios® V.

[Publication date] 2023/11/27

Intel Agilex® 7 FPGA & SoC External Memory Interface (EMIF) IP supports Debug Toolkit for use during debugging.

This video introduces the Intel Agilex® 7 FPGA & SoC and DDR4 Memory Debug Toolkit.

[Duration] 6 minutes 7 seconds / [Video release date]2021/01/07

Intel Agilex® 7 FPGA & SoC's External Memory Interface (EMIF) IP supports Traffic Generator 2.0 to test various behaviors.

In this video, we will explain the setting items of Traffic Generator 2.0 and introduce the test results with demonstrations.

[Duration] 4 minutes 23 seconds / [Video release date]2021/04/02

Here is an example of write and read operations from the FPGA-to-HPS Bridge of Intel Agilex® 7 FPGA & SoC to DDR4 memory in SDRAM direct mode.

[Published] 2022/09/20

This is an example of measuring the efficiency of DDR4 random address access using the external memory interface (EMIF) IP of Intel Agilex® 7 FPGA & SoC by changing the settings of the EMIF IP.

[Published] 2023/01/13

Intel Agilex® 7 F-series FPGAs & SoCs have an even more enhanced DSP block than the previous generation.

This video shows the enhanced DSP block and a quick demo using an example design.

[Duration] 1 minute 37 seconds / [Video release date]2021/01/21

Perform model-based design with DSP Builder for Intel® FPGAs for Intel Agilex® 7 FPGAs & SoCs. It introduces that the design can be described compactly and in an easy-to-understand manner by using vector representation for signals, and shows an example of designing a floating-point FIR filter as an example.

[Duration] 5 minutes 49 seconds / [Video release date] 2021/06/08

Intel Agilex® 7 F-series FPGAs and SoCs can perform I/O PLL reconfiguration in the same way as traditional Intel® FPGAs.
This video introduces how to perform I/O PLL reconfiguration using a sample design in the Design Store along with the actual operation procedure.

[Duration] 9 minutes 27 seconds / [Video release date] 2021/06/08

Intel Agilex® 7 FPGA & SoC can also perform partial reconfiguration in the same way as conventional Intel® FPGAs.
This video provides an overview of partial reconfiguration and shows the steps to perform partial reconfiguration using a sample design provided by Intel®.

[Duration] 19 minutes 27 seconds / [Video release date] 2022/01/11

Intel Agilex® 7 FPGAs & SoCs support Remote System Update (RSU), which allows configuration data to be selected and updated.
This video introduces the basic operation of RSU and the actual operation procedure using the sample design in the Design Store.

[Duration] 19 minutes 25 seconds / [Video release date] 2022/01/12