Linear Regulator Fundamentals (4) ~ Power Sequence ~

Narrow down by specifying conditions

現在2217件がヒットしています。check

Design Analog Devices

This article will explain the basics of linear regulators and LDOs. This time, we will explain how to create power supply sequences using typical linear regulators and LDOs, referencing datasheets from Analog Devices and other sources.

*This article includes the datasheet as well as the first half of Section 1 of Practical Power Solutions.

Is power sequencing necessary?

Why is power sequencing necessary?

Datasheets and application notes for microcontrollers, FPGAs, and analog integrated circuits specify power supply sequences as precautions for power supply. It is crucial to always check these sequences when using devices that require multiple power supply voltages.

If the power sequence is not followed, the type of problem that occurs will vary depending on the device's process, circuitry, and structure, but the following problems may occur:

1. Latch-up occurs, causing a large current to flow, and in the worst case, the device may be damaged.

2. Rush current flows, affecting the reliability of the device.

3. The internal logic timing may be out of sync, potentially leading to malfunctions.

Several problems like these can occur, potentially affecting device reliability and leading to circuit malfunctions, so caution is advised.

Please be sure to check if the device requires a power-up and power-down sequence like the following.

Figure 1: Power-up and power-down sequence

Precautions when using linear regulators or LDOs

Check if there are enable (EN) and shutdown (/SHDN) pins.

If you only need the power-up sequence, having enable (EN) and shutdown (/SHDN) pins is sufficient.

However, some linear regulators and LDO products do not have enable (EN) or shutdown (/SHDN) pins, so be sure to check if these pins are present.

Figure 2: Presence or absence of Enable (EN) and Shutdown (/SHDN)

Check if a fall-off sequence is required.

Recent low-voltage PFGAs and similar devices also require a fall-off sequence. Controlling a fall-off sequence using only enable (EN) and shutdown (/SHDN) pins can be difficult.

Linear regulators and LDOs often lack built-in power elements to draw charge into the output side. Therefore, if the capacitance of the capacitor between the output and the load is large, the voltage may not drop to the off state, causing a deviation from the power supply's power-down sequence.

In such cases, it is necessary to control the output voltage with an external FET (Figure 3).

Analog Devices offers LDOs with built-in power elements and discharge capabilities for drawing current. These products allow you to create power-down sequences without using external power elements.

For more details, please refer to the article "Points to Note Regarding Power Sequence for FPGAs (LDO Edition)".

To create a power sequence

We've summarized some points to keep in mind regarding power supply sequencing when using linear regulators and LDOs, but actually controlling the power supply sequence requires programming using a microcontroller or CPLD, which raises concerns about development time.

If you want to avoid programming, you might consider using Analog Devices' dedicated sequencing devices, which are designed entirely in hardware, as described below.

Tracking control

If you want to power on two regulators simultaneously, there are devices that perform tracking control. For example, using the LTC2923, it is possible to track the power on and off of two regulators (Figure 4).

A key feature of this device is that the tracking timing and tilt can be controlled by connecting resistors. Tracking control is possible with up to 4 channels (using LTC2925).

Sequence control using Power System Management (PSM)

For managing multiple power supply sequences, we recommend using a Power System Management (PSM). This series of devices offers options for controlling 2 to 24 channels with a single device. Furthermore, the number of controllable channels can be increased by daisy-chaining multiple devices.

For other features of Power System Management (PSM) products, please refer to the article "Recording System Anomalies Caused by Power Supply Circuits."

When creating a power supply sequence in a system using linear regulators or LDOs, please review the precautions, select components accordingly, and design the system to meet the requirements of the microcontroller or FPGA.

Please also consider making effective use of programming-free sequencing ICs and power system management ICs.

We also explain important points regarding the use of LDOs in our seminars. Please consider attending one of the seminars listed below.

Click here for recommended seminars/workshops

If you're interested in learning more about the load response characteristics of LDOs, how to evaluate LDOs using LTspice, junction temperature calculations, and sequence control discussed in this technical article, please consider attending one of the seminars listed at the link below: "Let's Learn the Basics of Linear Regulators Using LTspice!" or "Let's Check Derating Curves and Power Sequences Using LTspice!" (held every 3-4 months).

Analog Circuit Technology Seminar information is here