This article will explain the basics of linear regulators and LDOs. Using the Analog Devices ADP1715 datasheet as a reference, we will explain the power supply rejection ratio (PSRR), which is a measure of the noise rejection characteristics of typical linear regulators and LDOs.
*This article includes the datasheet as well as the first half of Section 1 of Practical Power Solutions.
Effect of PSRR characteristics of linear regulator
The power supply rejection ratio (PSRR) is a ratio that indicates how well a regulator can remove (reduce) ripple when ripple voltages of various frequencies are input from the input power supply.
When using a power supply configuration like the one shown in Figure 1, the ripple voltage (Vin Ripple) from the upstream DC/DC converter is input to the linear regulator. The input ripple voltage is filtered by the linear regulator's PSRR characteristics, reducing the output voltage ripple (Vout Ripple).
PSRR Formula and Value
The PSRR formula is expressed logarithmically as the ratio of input voltage to output voltage, as shown in Equation 1.
The larger the PSRR value, the better the noise rejection characteristics. If you are using a linear regulator in the hope of rejecting noise, be sure to select a product with a large PSRR value.
Equation 1: PSRR equation
Table 1 shows the PSRR value of the ADP1715. When the output voltage is set to 3.3V and the frequency is 1KHz, the PSRR value is 53 (dB). In this case, if a ripple voltage of 10mV with a frequency of 1KHz is applied to the input, the output voltage ripple is calculated as approximately 22uV using Equation 1.
PSRR frequency characteristics
Figure 2 is a graph showing the frequency characteristics of PSRR. In both graphs, we can see that at low frequencies, the PSRR is large and has a great effect as a filter characteristic, but as the frequency increases, the PSRR value decreases and the filter effect becomes smaller. It is important to note that PSRR has frequency characteristics.
For high-frequency noise, it is important to place a decoupling capacitor between the linear regulator and the load (FPGA or microcontroller).
The left and right graphs also show different output currents for the linear regulator. The left graph shows the characteristics for a light load (ILOAD = 100uA), while the right graph shows the characteristics for a heavier load (ILOAD = 100mA). Note that PSRR tends to decrease as the load current increases.
The ADP1715's low-frequency PSRR does not become extremely small, becoming 0 (zero), even when the load becomes large. However, be aware that there are linear regulators on the market from some manufacturers and products whose PSRR becomes 0 (zero) when a load current is drawn, causing the input ripple to be directly transmitted to the output.
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If you would like to learn more about methods for estimating output voltage errors and the impact they have on digital circuits, as discussed in this technical article, please consider attending the "Basic Seminar on Power Supplies for Digital Circuit Designers" in the seminar list at the link below (held every 3-4 months).
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