Fundamentals of Linear Regulators (3) ~ Load Response Characteristics ~

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This article will explain the basics of linear regulators and LDOs. This time, we will discuss the load response characteristics of typical linear regulators and LDOs, referencing datasheets from Analog Devices and other sources.

*This article includes the datasheet as well as the first half of Section 1 of Practical Power Solutions.

Regarding load response

This section describes the load response (transient response) of a typical regulator.

Figure 1 shows the load response characteristics to current load step variation. Weassume that the regulator supplies a stable currentin the initial state before applying this load step variation.

Subsequently, immediately after the load step variation,the output capacitor in the loop labeled ① supplies current to the current step. At this time, a voltage drop occurs due to the capacitor's ESR (equivalent series resistance)and a voltage drop due to a spike caused by the capacitor'sESL (equivalent series inductance). The capacitor then discharges to the load and supplies power over several microseconds until it is corrected by the load response in the regulator's feedback loop.

Figure 1: Load response

As voltage correction continues through the feedback loop (loop ②), the output voltage settles to the final value (including the stabilization offset) determined by the regulator. The regulator then supplies a stable load current to the entire system.

Load response characteristics of LDO ADP151

Figure 2 below shows an example of verifying the load response characteristics of the ADP151. With an input voltage of 5V and an output voltage of 3.3V, the waveform shows the output voltage fluctuation when the load current is varied between 1mA and 200mA (500mA/μs). The difference in load response is compared by changing the capacitance of the ceramic capacitor connected as the output capacitor of the ADP151 to 1μF, 10μF, and 20μF.

Reference URL: https://www.analog.com/jp/resources/app-notes/an-1099.html

From these results, it can be understood that if the load response characteristics of an LDO need to be improved according to the requirements of a microcontroller or FPGA, this can be addressed by increasing the capacitance of the output capacitor.

Investigation of load response characteristics using LTamides

Verifying the characteristics of the actual device, including load response characteristics, is fundamental. However, if you need to consider peripheral constants and perform other tests on the actual device to achieve the required characteristics, a certain amount of time will be required.
　

In this regard, using LTspice, which is provided free of charge by Analog Devices, to analyze peripheral parameters can improve the efficiency of the evaluation. Figure 3 shows the results of checking the load response characteristics by changing the capacitance of the output capacitor of the ADP151 in the same way as in the experiment using LTspice.

By using simulations in this way, it is possible to confirm the effect of changing the output capacitor capacitance to some extent on improving responsiveness before conducting actual hardware testing, and to estimate the required capacitor capacitance.

Figure 3: Confirmation of load response characteristics using LTspice

Click here for recommended seminars/workshops

If you'd like to learn more about the load response characteristics of LDOs and how to evaluate them using LTspice, as discussed in this technical article, please consider attending the seminar "Let's Learn the Basics of Linear Regulators Using LTspice!" (held every 3-4 months) at the link below.

Analog Circuit Technology Seminar information is here