PCB layout to handle high switching frequencies in regulators (3)

Have you ever wondered whether the switching frequency of a DC/DC converter should be kept high or low?

Not long ago, 300 to 500 kHz was the mainstream, but recently products with a switching frequency of 1 to 2 MHz have become common, and there are even products with a switching frequency of 4MHz or higher.

 

This article is the final chapter on this discussion. In the past two articles, I have explained the merits and cautions of using high-frequency DC/DC converters.

 

Chapter 1: Advantages of UsingHigh FrequencyDC/DC Converters

Chapter 2: Effects of Parasitic Inductance of Wiring Connecting Peripheral Components

 

In this article, I will explain the details of the confirmation of the effects of parasitic inductance on the PCB layout, focusing on the power ground (P-GND) and signal ground (S-GND).

The schematic is written with an ideal GND

Figure 1 shows the switching regulator LTC1871 asynchronous boost converter. This schematic is an ideal circuit with no parasitic inductance.

 

In simulations, the GND of the LTC1871 and the GND of the external components can ideally be at the same potential. However, in reality, the GND potential deviates due to the parasitic inductance of each component and PCB. Let's try to reproduce the GND circuit by focusing only on the actual PCB layout.

 

Figure 1: LTC1871 boost converter circuit
Figure 1: LTC1871 boost converter circuit

Power ground (P-GND) and signal ground (S-GND)

The power circuit has a power ground (P-GND) and a signal ground (S-GND). By stabilizing and strengthening these GNDs, it is necessary to prevent the effect of the gate drive switching current from affecting the analog controller section. Power circuits are usually on a single board and ideally all grounds are at the same potential. However, if any of the P-GND and S-GND pins are bouncing, the controller portion of the power circuit can be affected.

Figure 2 shows a GND pattern in which P-GND and S-GND are meshed with a 1mΩ resistor and 1nH inductance and divided by R8 and L8. P-GND and S-GND are usually connected by a small thin wire or through-hole or a 0 ohm resistor. Here, consider the case where there is solder connectivity and parasitic inductance, connect with R8 and L8, and check the effects.

Figure 2: Meshed power and signal ground schematics
Figure 2: Meshed power and signal ground schematics

Effects of parasitic inductance

Now, if there is a resistance component or parasitic inductance in R8 or L8, will it cause problems in the operation of the regulator? Let's look at the simulation results.

The switch node in Figure 3 has a very fast rise time of 10ns (green waveform in Figure 3). At this time, when the SW node and S-GND are set to a small parasitic capacitance of 1pF and the simulation results are confirmed, there is a large voltage spike and ringing at the S-GND node (red waveform in Figure 3/P-GND reference). You can see what is happening. This confirms that there is a voltage difference in the controller portion of the power supply circuit, which can cause circuit operation problems.

In order to minimize the ringing between the two S-GNDs, it can be inferred that the parasitic inductance L8 connected to P-GND should be reduced from 1mH to 1nH and the impedance R8 should be reduced from 10mΩ to 1mΩ. So let's check it with a simulation.

Figure 3: Output waveform affected by inductance (L8 = 1mH / R8 = 10mΩ)
Figure 3: Output waveform affected by inductance (L8 = 1mH / R8 = 10mΩ)

Reduce parasitic inductance and resistance between P-GND and S-GND

I actually tried lowering the values of R8 and L8 between P-GND and S-GND. As a result, we can confirm that the S-GND ringing has decreased (the red waveform in Figure 4 is smaller than the red waveform in Figure 3).

From the above, it is not possible to reproduce the real world waveform itself in the simulation of the entire circuit, but the simulation circuit is focused on the problem part when designing a specific circuit part (GND in this case). By assembling, it is possible to reproduce problems in an easy-to-understand manner regarding the placement of devices and components, how to take GND, etc., and I think you can understand the points to be careful about.

Figure 4: Output waveform affected by inductance (L8 = 1nH / R8 = 1mΩ)
Figure 4: Output waveform affected by inductance (L8 = 1nH / R8 = 1mΩ)

PCB layout considerations by controller type

Now let's look at the PCB layouts for other types of controllers.

Below is the power stage of the most common BUCK converter (Figure 5). As you can see in this diagram, the BUCK converter looks the same as the BOOST converter except the control MOSFET is on top. This produces a pulsed switching current on the input side. In this case it is the input capacitor that has to handle the high switching current and the loop circled in red should be small. Only a small sawtooth ripple current flows through the output capacitor.

A pulsed ground current originates from MOSFET M1 and the input capacitor. Placing M1 and the input capacitor next to each other will add the two currents. The resulting ground current looks like a DC current with a sawtooth current ripple superimposed on it. The rest of the component placement and PCB layout are exactly the same as the PCB layout of the BOOST converter

Figure 5: Block diagram of BUCK converter
Figure 5: Block diagram of BUCK converter

Now consider the case of the BUCK-BOOST converter. The circuit is shown below.

At first glance, the BUCK-BOOST converter is more complicated. However, the circuit can be decomposed into a BUCK converter and a BOOST converter. Each circuit switches its operation according to the input voltage.

When the input voltage is lower than the output voltage, it works as a BOOST converter, and when the input voltage is higher than the output voltage, it works as a BUCK converter. Each section of this circuit can be laid out separately.

The two sections do not have to be close together. However, it is recommended to keep them close together to minimize the size of the switch node, which is a source of EMI. Also, keep the controller away from the two high switching current regions.

In addition, as a common item for Buck, Boost, and Buck-Boost converters, basically, it is recommended that the MOSFET/switch node, inductor, and output capacitor (Cout) be placed on the same surface. If the placement surface is different, the wiring distance becomes longer and a tight layout cannot be achieved. If this is handled by passing through holes or vias, etc., parasitic inductance will occur in that part, and a large spike voltage will be generated during switching. It is possible, so be careful.

Figure 6: Block diagram of the BUCK-BOOST converter
Figure 6: Block diagram of the BUCK-BOOST converter

Summary

PCB Layouts for Handling High Switching Frequencies in Regulators (1)-(3) introduced some of the considerations for implementing PCB layouts for high switching frequency, high current power converters. If you are unfamiliar with the layout of the regulator, be sure to refer to the demo board's PCB layout as a guideline.

Also, for more information on PCB layout, please refer to Application NoteAN-136.

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