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In this column, we will introduce "technical information on FPGA that is surprisingly unknown, but makes a difference if you know it."
From FPGA beginners to veterans, the contents can be used widely, so please keep in touch with us until the end.
[Lesson 9] How to reduce short-circuit power
Consider how to reduce “Q (charge due to through current)”, one of the short-circuit power parameters, from the power consumption calculation formula.
Since “Q” flows with both pMOS and nMOS transistors open, closing the transistors quickly is a way to reduce “Q”.
To do so, you can either reduce the load capacitance of the output or increase the driving power of the transistor.
lower the load capacity
The load capacity is the sum of the wiring capacity connected to the output and the input pin capacity of the next stage.
Lowering the load capacity lowers the switching power more than the short-circuit power and shortens the delay time.
See Part 6 for how to lower the load capacity.
Increase the drive strength of the transistor
There are two ways to increase the drive power of a transistor: connecting the transistors in parallel and increasing the size of the transistors.
For example, gate arrays have fixed transistor sizes, so parallelization can increase driving power.
To get 1x ⇒ 2x drive strength, add only 1 pMOS (only 1/4 gate).
Since the size of the transistor in the standard cell can be changed, it is possible to optimize the size of the transistor and prepare a cell with the desired driving force.
(Actually, rather than preparing one large transistor, it is best to gradually increase the driving power of the transistor every 2.7 times.)
However, in order to increase the drive power in FPGA, large blocks are parallelized, so increasing the drive power may consume a lot of power. Therefore, in the case of FPGA, it is not recommended to increase the drive power to reduce the short-circuit power.
Bi-directional buffer
If the signals of the bi-directional buffer conflict (the L signal and the H signal collide), it consumes a fairly large penetrating power, so conflict should be avoided as much as possible.
glitch
Short-circuit power is consumed when the signal is at an intermediate potential that is neither “L” nor “H”.
If many glitches occur in the arithmetic circuit, the signal becomes an intermediate potential signal, which consumes a lot of short-circuit power. Glitch is tricky as many power simulators can't handle this power.
When the power supply voltage was 5V, the short circuit power accounted for ~30% of the entire circuit. Now that the power supply voltage is 1V or less, it is less of a concern than leakage power and switching power.
However, shoot-through current shortens the life of the device, so it should be suppressed as much as possible.