hello.

My name is Intel F. Hanako and I provide technical support for Intel® FPGA products at Macnica.

 

The on-chip debug function Signal Tap logic analyzer that comes standard with Quartus Prime.

How do you select the internal signal of FPGA?

 

 

When registering the internal signal of the user circuit to be monitored in the STP file, it is usually selected using the node search window called Node Finder.

Node Finder launched from STP file

 

But finding a signal with Node Finder is because the signal name is only letters

It's hard to imagine which part of your design it is, and to be honest, it's hard to choose for users who don't have much experience working with Quartus® Prime.

In such a case, I recommend using the TechnologyMap Viewer to select internal signals! ! !

 

 

The Technology Map Viewer is a graphical viewer of the pre-synthesis and post-place and route netlists of your design.

There are two types, Post-Mapping and Post-Fitting, and the Post-Fitting viewer is used in Signal Tap this time.

Cross-probing from Technology Map Viewer (Post-Fitting) to *.stp

 

Visually search for the internal signals you want to monitor with the Technology Map Viewer (Post-Fitting) and import them into the STP file, as shown above.

 

Some users may be using this viewer for the first time, but it is a viewer function that can be used in conjunction with various debugging such as timing analysis in addition to Signal Tap, so please try using it by all means.

Debugging will be easier if you can use each Netlist Viewer including Technology Map Viewer♪

Give it a try!

Click here for recommended articles/materials

Let's try FPGA on-chip debugging Signal Tap

Quartus® Getting Started Guide - Using the Signal Tap Logic Analyzer