I will explain Rambus, which is a representative of the small-amplitude bus mentioned in "Bus Transmission - Part 1". It was developed as a memory bus.
Rambus
Rambus is a bus transmission system developed by Rambus. Rambus started with the base model and its successor, the concurrent model. Both of these were 9 bits wide.
To distinguish from these, the current Rambus is called Direct Rambus.
When Direct Rambus (hereafter referred to simply as Rambus) was first developed, it was a so-called double data rate method in which 2-byte (16-bit) width data was transferred at the rising and falling edges of a 400 MHz clock. It was an epoch-making method at the time, with a transfer rate of 1600 MB/s.
Characteristics of Rambus
Figure 1 shows the operating principle of Direct Rambus, and its features are enumerated based on this figure.
(1) Zero stub length
Since the chips are directly connected onto the bus, there are no wiring stubs to connect the bus and the memory.
(2) Current source driver
The driver is an open-drain type of N-channel transistor, so the output capacitance is small. (Footnote 1)
(3) Current source driver
Being a current source driver, the output impedance is infinite (open).
(4) total internal reflection
For example, in the transmission from the memory to the chipset, the amplitude is halved because the signal is split left and right when viewed from the memory, but since the chipset side is open, the amplitude is doubled due to open reflection. , the desired amplitude can be obtained.
(5) High impedance
The signal that is open-reflected on the chipset side returns to the driver side again, but as described in (3), the driver is open, so it is not reflected when passing through the driver.
(6) No reflection due to matched termination
A signal that has passed through the driver is absorbed by a terminating resistor provided on the opposite side.
(7) No reflection due to matched termination
At the termination location, the signal that first traveled away from the chipset is absorbed by the termination resistor, and together with the signal due to the reflection of (5), the waveform at this location is not clean. However, the traffic lights here are unnecessary, so it doesn't matter if they are dirty.
In addition to the features mentioned above, Rambus has adopted a number of new technologies and continues to contribute significantly to the development of SDRAM (Synchronous Dynamic RAM).
Disadvantages of Rambus
In terms of signal integrity, we developed an extremely advanced and excellent technology, but there was a fatal flaw in adopting it for the main memory of a PC, and we could not establish the position of the main memory of the PC.
Please think about the reason by looking at the Rambus memory module shown in Figure 2. The answer is given at the end of the sentence.
SSTL
SSTL (Series Stub Termination Logic) applied to SDRAM is a memory bus developed to compete with Rambus.
For details on SSTL, please refer to "Bits of Knowledge: SSTL - Part 1" and "Bits of Knowledge: SSTL - Part 2" in this column.
<span="bold">Footnote 1
A typical CMOS output consists of a pair of pMOS and nMOS transistors stacked on top of each other (see Simultaneous Switching Noise, Figure 1).
In general, pMOS transistor size is about three times that of nMOS, so the capacity is equivalent to four transistors when converted to nMOS. Rambus, on the other hand, has a single nMOS transistor, so the output circuit capacity is about 1/4 that of CMOS.
<span="bold">Answer
Since the memory bus has a structure in which the bus wiring passes through the module, it is not possible to expand the memory. It was not suitable for PCs with memory expansion because it was necessary to install a full memory module from the beginning or install a memory module without a memory element. However, it is still widely used in game consoles that do not require additional memory, taking advantage of its narrow bus width and high-speed transfer.
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