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This "Quartus® Guide" series is intended for users of Quartus® Prime / Quartus® II development software.

For information on FPGA/CPLD development flows, please refer to this link.

explanation

This document will be useful as a reference during the "3. Logic Circuit Design" phase of FPGA/CPLD development.

This document describes FPGA/CPLD device migration and how to configure that migration.

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FPGA / CPLD devices support device migration within the same device family. Even if the devices that support migration are not pin compatible, it is possible to design a board that can be replaced by setting the migration with a tool.

For details, please check the documentation.

Document

This document has been renamed from v15.1.

ELS1407_Q1510_10__1.pdf

"Quartus Prime - Device Migration ver.15.1" (Document for tool version: Ver 15.1)

ELS1346_Q1400_10__1.pdf

"Altera FPGA/CPLD Device Migration ver.14" (Document for tool version: Ver 14.0)

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Altera® FPGA Development Flow / FPGA Top Page

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Altera® FPGA-related FAQs