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This "Quartus® Guide" series is intended for users of Quartus® Prime / Quartus® II development software.

For information on FPGA/CPLD development flows, please refer to this link.

explanation

This document will be useful during the "5. Setting Constraints" phase of FPGA/CPLD development.

This document describes how to configure commonly used pin options in Quartus® Prime / Quartus® II development software.

Use the Assignment Editor and Pin Planner in the Quartus ® Prime / Quartus ® II development software to set pin options when you want to assign a specific function to a pin or an internal signal.

Document

ELS1413_Q1510_21__1.pdf

"Quartus Prime - How to Set Commonly Used Pin Options ver.15.1" (Document for tool version: Ver 15.1)

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Quartus® Prime related articles and resources
Altera® FPGA Development Flow / FPGA Top Page

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Quartus® Prime related FAQs
Altera® FPGA-related FAQs