explanation

This document will be useful as a reference during the "3. Logic Circuit Design" phase of FPGA/CPLD development.

This document explains how to use the schematic editor in Quartus® Prime / Quartus® II.

Quartus® Prime / Quartus® II supports schematics, AHDL, VHDL, Verilog HDL, EDIF, and VQM as design entry methods. This document introduces the basic operations of the schematic editor, one of these entry methods (how to input schematics, connect nodes, input pin names, etc.).

Document

ELS1270_Q1000_10__1.pdf

"Quartus II Getting Started Guide - How to Use the Schematic Editor" (Tool Version: Ver. 10.0 Document)

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