explanation

Altera FPGAs create data to configure and connect physical resources within the FPGA through a compilation process (logic synthesis, placement, and routing) using design software (Quartus® Prime development software). This compiled data is then downloaded into the FPGA to realize the required functions as hardware.

Generally, FPGAs are manufactured using SRAM-based technology, and since internal data is not retained when the power is turned off, it is necessary to store compiled data in external non-volatile memory and download the compiled data into the FPGA when the power is turned on. This mechanism is called "configuration," and Altera® FPGAs offer several configuration methods.

Although the configuration circuit has a relatively simple structure, as will be discussed later, and is considered a "mature feature," support requests related to configuration still consistently account for about 20% of all requests, and a certain percentage of problems such as "configuration failures" occur. The following factors are thought to be responsible for this.

■ Circuit configurations and setup methods differ slightly from generation to generation of FPGA.
■ The user manual has become longer due to the addition of features such as configuration methods, encryption, and remote updates.
■ The clock speed has been increased to shorten the configuration time associated with the increased capacity of FPGAs.

Configuration is performed in the very early stages, and if it fails, the FPGA will not function. Therefore, configuration problems can have a significant impact on the customer's subsequent development process.

This document summarizes the points to be aware of in board design, common problems, and how to address them in the simplest active serial configuration using Quad SPI (QSPI) Flash.

The applicable devices are Stratix® V, Arria® V, and Cyclone® V.
(There are some differences in previous family models, as well as in the Arria® 10 and Stratix® 10, so please be sure to refer to the user manual for your respective device.)

<Contents>

Introduction
What is configuration?
Design Guidelines
Debugging Guidelines
summary
Appendix

Document