Types and calculation methods of FPGA power consumption

Narrow down by specifying conditions

現在2229件がヒットしています。check

DesignFPGA /CPLD/ASIC Altera Corporation

Introduction

Hello. I'm Taro Washimiya, and I provide technical support for Altera® FPGA products.

By the way, when you design a board to implement an FPGA, how do you determine the power consumption of the FPGA?

To determine the power consumption of an FPGA, you first need to understand that its power consumption is determined by the following main factors.

Standby (static) power consumption
Active (dynamic) power consumption
I/O power consumption

Then, let's take a step-by-step look at how the power consumption can be determined.

Three power consumption types

Standby (static) power consumption

The standby (static) power consumption of a device due to leakage current is said to depend on the following factors:

die size
temperature
Process variation

Static power is generally independent of resource utilization. In addition, it can be estimated before detailed device characterization (actual device evaluation such as debugging), and can be defined in two types: standard power consumption and maximum power consumption.

Active (dynamic) power consumption

In terms of operating (dynamic) power consumption, power is first needed to charge and discharge internal capacitors in the logic array and interconnect networks. Logic level changes such as 0 → 1 and 1 → 0 at internal nodes dissipate power inside the device.

Power consumption during core operation includes both routing (wiring) power consumption and logic element (the smallest unit of logic resources that make up a combinational circuit or sequential circuit) power consumption. Logic element power is dissipated from charging and discharging internal node capacitors and also from internal resistive elements. Routing power comes from the current required to charge and discharge external routing capacitors driven by each logic element.

I/O power consumption

I/O power consumption is consumed by the following factors:

Device output pin
Output Driver Circuit Operating in Resistive Mode
Charges and discharges external load capacitors connected to the external termination network (if present)

Power Estimation Methods & Analysis Tools

Now that you understand the main factors that determine power consumption, how do you actually calculate the power consumption?

Altera® provides tools for Altera® FPGA users to estimate and analyze power consumption.

Article header library 121889 pic01 1 — Power Estimator & Analysis Tool

PowerPlay Early Power Estimator (EPE)

Excel-based power consumption estimation tool. There are two types of Quartus® Prime Design Profiles: User Input, which manually inputs and estimates FPGA resources, and Quartus® Prime Design Profile, which generates a CSV file that extracts resource information from the Quartus® Prime project under design (during circuit design) and easily imports it to EPE. There is a way.

It is often used when estimating relatively early in the design process.

Click here for an article explaining how to estimate with EPE
How to estimate FPGA power consumption

PowerPlay Power Analyzer (PPPA)

Quartus® Prime-based power analysis is available. Place-and-Route Results, which is estimated based on the toggle rate set by Quartus® Prime's PowerPlay Power Analyzer without performing function simulation, and PowerPlay Power, which generates data based on the waveform from the function simulation results There are two types of Simulation Results that are imported into Analyzer and estimated.

Power consumption characteristics

The image below shows the basic power consumption characteristics of an FPGA. After the power is turned on (Power-Up), it becomes a static state, and when the configuration of the FPGA is completed and it starts operating, it becomes the operating power (dynamic + I/O + static).