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In SDC, how would you perceive both create_generated_clock and derive_pll_clocks with different constraints?

Timing constraints/analysis

The priority of create_generated_clock and derive_pll_clocks changes according to the order in which they are written.

If derive_pll_clocks is above create_generated_clock, the create_generated_clock constraint will be ignored with a warning.
If create_generated_clock is written above derive_pll_clocks, create_generated_clock is recognized correctly.

Be sure to check what constraints are being recognized in the TimeQuest Timing Analyzer's “Report Clock” to see how the clock is done.

Related technical information/FAQ

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