I ran a simulation of Intel's PLL, but even though I was inputting a clock, there was no output. Why?

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Intel: I've simulated the PLL, but there is no output even though the clock is being input. why?

Clock/PLL simulation

In a design where the PLL input is only a clock, if the PLL output waveform is not output (undefined), the cause may be the input clock frequency set in the simulation file.
(Simulation files refer to vwf for Quartus II and testbench files for ModelSim.)

Check if the simulation file defines a clock input frequency that is far outside the clock input frequency range supported by the created PLL design.

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