Intel: Why does the output clock fluctuate when I select Fractional-N PLL compared to Integer-N PLL?

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Intel: Why does the output clock fluctuate when I choose Fractional-N PLL compared to Integer-N PLL?

Stratix Clock/PLL

Category: Specifications
tool:
Device: Stratix® V

This is because the fractional-N PLL dynamically oscillates between two adjacent integer division ratios to achieve the desired fractional division ratio.
(Adjustments are made so that the target fractional division ratio is evenly distributed.)

Reference: Basic Configuration of Analog PLL Part 4

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