Early MAX 10 FPGA ES devices ship with the watchdog timer enabled. This watchdog timer is a feature of the MAX 10's dual configuration circuitry that allows safe field updates.
However, in this case, being incorrectly enabled will erase the configuration SRAM in the MAX 10 FPGA.

To resolve this, load a Personality containing a non-volatile FPGA image. (For example, "Dual Config FPGA LOAD" written at the time of shipment from the factory)
Alternatively, you can use a USB Blaster or console menu to erase the MAX 10's Flash.

For more information, please refer to the User Guide or other FAQs on how to erase the FPGA.