Overview

Comparing datasheets for SiC switches can be difficult. Although SiC MOSFETs appear to have the advantage of a lower temperature coefficient of on-resistance, this indicates higher underlying losses and lower overall efficiency compared to ON Semiconductor's SiC cascode JFETs. To make a proper comparison, you should compare parts with the same voltage ratings, manufacturer recommended gate drive voltages, the same junction temperatures and drain currents, and the same packages.

SiC MOSFET resistance is dominated by its channel resistance

The lower value of RDS(ON) temperature coefficient for SiC MOSFETs actually indicates a deeper effect. MOSFETs and JFETs are "single-carrier" devices with electrons flowing through different regions: the substrate, the drift layer, the JFET region, and the channel. In the 650VSiCMOSFET the inversion channel dominates the total resistance and actually decreases with temperature. Channel resistance is inversely proportional to (number of free carriers x mobility of electron inversion layer) and as temperature increases, threshold voltage decreases and the number of free carriers in the channel increases, thus decreasing resistance .

This effect is offset by the positive temperature coefficients of the rest of the device area, i.e. JFET, drift layer and substrate resistance, producing a small net positive Tc value. SiC JFETs do not have an inversion channel to offset the positive temperature coefficients of the JFET, drift layer and substrate. Low-voltage Si MOSFETs, on the other hand, account for only a small fraction of the total on-resistance, which explains their higher Tc values than SiC MOSFETs, but also the absence of losses associated with the non-ideal SiC inversion layer. can be seen (Fig. 1).

Figure 1: ON Semiconductor's SiC cascode JFET, showing the typical SiC MOSFET trench structure and the absence of the lossy SiCMOS inversion channel, has a higher temperature coefficient of on-resistance but lower losses.

SiC FETs have low overall conduction losses

Looking at the absolute values, the story is conclusive: Comparing the RDS(ON) of 650/750V devices, as shown in Figure 2, the ON Semiconductor SiC cascode JFET starts out with roughly one-third the specific on-resistance of the SiC MOSFET at 25°C, and even at 150°C it is nearly two times better, with roughly half the conduction losses for the same active die area.

Figure 2: ON Semiconductor's SiC cascode JFET has a high on-resistance Tc, but the absolute value is low

The net effect is that ON Semiconductor's SiC cascode JFETs and their healthy positive temperature coefficient of RDS(ON) ensure lower overall conduction losses and effective current sharing between the cells and parallel devices. It is clearly beneficial to verify that the comparison is valid and understand the mechanisms behind the effects; it can shed light on what really matters: reduced overall losses.

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