Current status of SiC device and package technology

It has long been known that packaging technology is critical to unlocking the potential of wide bandgap (WBG) devices. Silicon carbide device manufacturers are rapidly improving device technology figures of merit such as on-resistance per unit area (RdsA) while simultaneously reducing parasitic capacitance for faster switching. A new package has been released that allows users to take better advantage of the WBG fast switching performance. Standard modules are becoming more available and new switching technologies are being applied to increase the value of products with faster switching speeds, improved thermal resistance and improved reliability.

device technology

SiC Schottky diodes account for over 50% of SiC sales, primarily in the 650V, 1200V and 1700V classes. 650V diodes are used in power factor correction (PFC) circuits in computer, server and telecom power supplies and secondary rectifiers in high voltage battery chargers. 1200V and 1700V diodes are used in a wide range of circuits such as solar boost circuits, inverters, welding and industrial power supplies.

SiC Schottky diodes significantly reduce QRR compared to silicon fast recovery diodes, resulting in reduced EON losses in the switches of half-bridge or chopper circuits operating in hard-switched continuous conduction circuits. Because pure Schottky diodes have weaknesses under avalanche and forward surge conditions, most manufacturers offer JBS diodes, which add a PN junction to join the Schottky, shielding it from high surge voltages and reducing leakage currents, improving avalanche robustness. The PN junction bipolar reduces the forward voltage drop due to surge conditions.

In general, SiC diodes have a much higher surge resistance than silicon fast recovery diodes. This is mainly due to the smaller forward voltage they experience under surge conditions: only 1-2 V for silicon, compared to 4-6 V for SiC-FETs. However, this creates thermal issues as the die of the SiC diode is very small.

Manufacturers have used wafer thinning to reduce the on-state forward voltage and therefore the thermal resistance. They have also employed advanced die attach methods in TO and DFN packages, such as silver (Ag) sintering, to minimize the thermal resistance and prevent melting under surge conditions as traditional solder joints do. This allows them to provide approximately 8-12 times the surge capability for their rated current.

SiC transistor technology

Figure 1 shows the major device structures that dominate the market for 650V high performance FETs for power conversion. Of these, Gallium Nitride (GaN) HEMTs (High Electron Mobility Transistors) are the only planar devices with both power terminals on the top surface of the wafer. Silicon superjunction devices use the charge balance principle, with equal doping of N-type and P-type columns resulting in effectively zero charge, allowing rapid depletion to sustain voltage even when the N-type columns are highly doped for low resistance.

Between 2000 and 2018, the on-resistance was reduced to almost 1/10 of conventional silicon without charge balancing by adding more N-type columns per unit area. Silicon superjunction technology accounts for $1 billion in annual sales, with products on the market with on-resistance per unit area (RdsA) values as low as 12-18mΩ-cm2, and at the cutting edge, even 8mΩ-cm2 can be achieved.

GaN HEMTs now have excellent switching behavior, with RdsA currently in the range of 3-6 mΩ-cm2. These are planar devices built on silicon substrates, which are much cheaper than SiC substrates, but currently GaN devices are still more expensive than Si devices. 650V SiC trench and planar MOSFETs are also available, with RdsA in the range of 2-4 mΩ-cm2. ON Semiconductor's trench JFETs (2nd generation) have achieved RdsA values of 0.75 mΩ-cm2.

This means that the SiC JFET die can be 1/7 to 1/10 the size of silicon, and therefore much smaller than GaN or SiC MOSFET structures - critical information if a designer's goal is to achieve cost parity with silicon.

Figure 1: Device architectures most commonly used for 650V transistors of silicon superjunction, GaN HEMT, silicon carbide (SiC trench MOSFET) and SiC trench JFET (junction field effect transistor)

Most power devices are trench type, providing space for high current electrodes, GaN HEMTs are planar, with both power electrodes on the top surface.

ON Semiconductor's SiC cascode JFET uses a cascode structure as shown in Figure 2, where a low-cost 25V silicon MOSFET is co-packaged with a normally-on SiC JFET, making it a device that can be used to replace normally-off MOSFETs, IGBTs, or SiC MOSFETs. The device also performs well in freewheeling diode mode, eliminating the need for an anti-parallel silicon fast recovery diode used with the IGBT or SiC MOSFET Schottky diode.

Figure 2: Inside the ON Semiconductor cascode FET, a 25 V silicon MOSFET is packaged together with a SiC JFET to provide normally-off operation, simplified gate drive, and excellent body diode action.

 

 

The device can be dropped into existing silicon MOSFET and IGBT sockets and can be used interchangeably with all types of SiC MOSFETs.

Figure 3 compares the structures of IGBTs, SiC MOSFETs and trench JFETs. IGBTs are bipolar devices that turn on with a knee voltage of 0.7V, after which the injection of charge carriers reduces the resistance of the wide voltage blocking layer. To return the device to the blocking state, these carriers must be removed, inevitably resulting in "switching" losses, which are much larger than those incurred by SiC MOSFETs.

In contrast, ON Semiconductor's cascodes can directly replace silicon carbide per unit area, improving efficiency. The absence of knee voltage in conduction for SiC MOSFETs and SiC Cascode FETs improves efficiency even in low frequency applications.

Figure 3: Above 1200V, the most commonly used silicon device is the fieldstop IGBT

SiC MOSFET and SiC trench JFET structures are shown side by side. SiC devices use 10 times thinner voltage blocking layers with 100 times higher doping levels, enabling lower resistance. Silicon IGBTs lower their resistance by injecting stored charge in the on-state. It must be added and removed on each switching cycle.

Figure 4 details the various SiC transistor offerings currently on the market. Most suppliers offer SiC planar MOSFETs, but some have introduced trench MOSFETs. All SiC MOSFETs suffer from poor in-channel mobility (about 15-30 times worse than silicon), but trench MOSFETs are better due to the crystallographic orientation of the channel. Trench JFETs have a bulk channel with much higher mobility, resulting in lower resistance per unit area for devices rated between 650V and 1700V.

Figure 4: Device structures for SiC planar and trench MOSFETs and SiC trench JFETs

A MOSFET has a channel that is induced under the gate oxide by a voltage applied to the gate. The JFET channel exists with no voltage and is pinched off by reverse biasing the gate-source PN junction. The low resistance of trench JFETs comes from the bulk channel, without the need to shield the gate oxide from high electric fields.

SiC devices typically operate at 10 times the electric field strength of silicon devices, which allows them to be built with a drift layer that is 10 times thinner. This is not an issue for bulk channel devices like JFETs, but care must be taken at the oxide/SiC interface in MOSFETs to avoid levels of oxide stress that would shorten their operational lifetime or cause excessive failure rates. Inevitably, for both planar and trench JFETs, shielding the gate oxide to manage this area will further increase on-resistance.

The resistance of SiC JFETs is now so low that the SiC substrate on which the device is built contributes more than 50% of the resistance for the 650V class and 30-40% for the 1200V class. For this, wafers are thinned from an initial thickness of 350um to 100-150um and a laser contact can be made from the backside, a process patented by ON Semiconductor.

Scaling this technology and improving cell design is expected to further reduce the on-resistance to 0.5mΩ-cm2 at 650V and 1.0mΩ-cm2 at 1200V. The SiC cost reductions driven by rapidly growing demand are therefore likely to be further boosted by these technology improvements. Most production today is on 6-inch wafers, with 8-inch efforts beginning. Devices rated at 100A-200A are now available.

packaging technology

SiC devices are offered both as discrete devices and as power modules where high power levels are required. Currently the market is dominated by power discrete devices, with module adoption growing rapidly. Figure 5 shows the range of discrete packages available for SiC diodes and transistors.

ON Semiconductor is rapidly adding package types to give power circuit designers all the choices they need to meet their system constraints. Nearly all of these packages are well known industry standard packages widely used for silicon devices. While the outer dimensions of the packages remain unchanged, there are many internal enhancements to better exploit the capabilities of SiC devices.

Figure 5: Typical range of package options available for SiC discrete diodes and transistors

Power ratings increase from left to right. Devices from 2A to 200A are available in separate formats. Source Kelvin packages are of interest in SiC transistors because they allow much faster switching.

Ag sintering is used to attach the SiC die to the lead frame, which helps overcome the thermal resistance challenges brought about by thinner chips and shrinking chip sizes. Recently, the adoption of TO247-4L, D2PAK-7L and DFN8x8 devices for SiC has helped to solve the gate drive issues associated with high speed switching that occur in traditional packages such as D2PAK-3L, TO220-3L and TO247-3L, which have large common source inductance.

While traditional 3-lead packages remain the industry workhorse, there is a move towards "Kelvin source" packages as they provide cleaner, faster switching with little or no cost impact. Cascode devices have limitations in controlling the turn-off transient by varying the gate resistor, especially if you want to make the delay time long enough to prevent high speed operation.

To manage that, ON Semiconductor offers devices with separate speed ranges, pre-tuned internally for a specific maximum switching speed (UJ3C and UF3C series). If the circuit suffers from excessive voltage overshoot or power loop ringing, a small RC snubber can be very effective with minimal loss effects. To assist the user, a user guide is available on the ON Semiconductor website with gate drive and snubber recommendations to make the device easier to use.

Given the increased current density of SiC devices compared to silicon devices, packaging techniques to extract current from the source terminal on the top of the chip are also improving. Techniques such as aluminum ribbon bonding, thick copper bond wire with copper buffer, and bond wireless packaging with Cu clips are among the main methods to extend the power cycling lifetime of SiC transistors in both discretes and power modules.

Embedded packages are also expected to enable further improved low inductance architectures in the future, incorporating gate drivers and capacitors to improve high speed switching efficiency while minimizing inductance. A wide range of power modules are soon to hit the market, from small modules like the Easy-1B/2B, to larger modules with the same footprint as standard IGBTs, such as 34mm, 62mm and EconoDUAL style modules.

For EV inverters, a variety of technologies are being optimized for SiC, from hybrid pack style modules with pin fin heat sinks to double sided cooling options. Figure 6 shows an ultra-low inductance module proposed by Semikron that allows for very fast switching with manageable overshoot voltages. Figure 7 shows an Apex Microtechnology SIP module incorporating half bridge drivers and FETs and associated fast turn-on and turn-off waveforms using an ON Semiconductor 35mΩ, 1200V stacked cascode.

Figure 6: 400A, 1200V module with 1.4nH loop inductance demonstrated by Semikron in 2017

The reduced magnetic flux in a low-inductance design eliminates the fast-switching ON-state release of SiC, allowing for improved performance and lower system-level costs.

Figure 7: ONSEMI 35m, 1200V stacked cascode and SIP module with built-in half-bridge driver

Used to switch at 40A, 800V with very fast rise and fall times. These advances simplify the use of high-speed devices, and the ability to use compact high-frequency designs to reduce passive components provides significant system-level cost benefits.

SiC devices have always been expected to offer significant benefits in the higher voltage arena, with XHP type modules initially released at 3300V and 6500V, with 10KV on the way. ON Semiconductor offers a unique approach to this space with its Supercascode approach.

In this method, high voltage devices are built by connecting low resistance 1700V devices in series, all controlled by a single low voltage FET at the bottom of the string. This approach is highly scalable, allowing the implementation of 3300V to 20KV modules without the need for high voltage chips. This is particularly useful for implementing high voltage solid state circuit breakers and solid state transformers that connect to the medium voltage grid.

Conclusion

Rapid advances in SiC device and package technology continue, increasing market acceptance for many fast-growing end-market applications. This will drive new WBG product development in many directions, from very fast switch devices for DC-DC conversion, EV on-board chargers and server power supplies to very low conduction loss modules for EV inverters. A number of next-generation system designs are underway that will take advantage of these improved WBG device capabilities, and the market will soon see a whole new level of power performance and efficiency brought about by SiC technology.

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