explanation
This section introduces a method of referencing one function from multiple CPU cores (Nios® II) when multiple Nios® IIs are used to create a multi-core configuration.
Please use it when you do not have enough program memory and you want to share functions with multiple Nios® II.
Document
Tool version: Document for Ver.14.1
sample design
Tool version: Sample for Ver.14.1
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Nios® II related articles and resources
Intel® FPGA Development Flow/FPGA Top Page
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Nios® II Introductory Trial Course <Free>
Custom microcomputer design trial ~Experience embedded design using MAX® 10 FPGA! ~ <free>