Click here for the previous article "Basics of PAM4 Interface (1)"

Ingenuity of bit allocation to each level

Last time, I explained that 2 bits of information are assigned to each of the 4 levels of the PAM4 signal.

Since there are 2 bits, there are four possible states: (0,0), (0,1), (1,0), and (1,1) (the first value in parentheses is the MSB, and the second value is (expressed as LSB).

Consider assigning these four states to the four levels of PAM4.

 

Consider a bit error at the receiving side when transmitting with the bit allocation shown in Figure 1.

Bit allocation (binary code) for 4 levels of PAM4

Figure 1. Bit allocation (binary code) for 4 levels of PAM4

 

 

Let's say that a signal sent as 0 level (0,0) from the sender is perceived as 1 level (0,1) at the receiver.

In this case, MSB 0 information is correctly transmitted as 0, so no error occurs, but LSB 0 is recognized as 1, so a 1-bit error occurs.

 

Next, let's consider a case where a signal sent as 1 level (0,1) from the transmitting side is recognized as 2 level (1,0) at the receiving side.

In this case, both the MSB and LSB will be errors, so the bit error condition will worsen, resulting in a 2-bit error.

 

As explained last time, in PAM4, the amplitude difference between each level is 1/3 compared to NRZ, so the SNR is also 1/3. The actual bit allocation is usually as follows to eliminate even a little.

Bit allocation for 4 levels of PAM4 (gray code)

Figure 2. Bit allocation for 4 levels of PAM4 (gray code)

 

 

As shown in Figure 2, bit allocation in actual transmission is (0,0), (0,1), (1,1), (1,0) in order from the 0 level side.

If a signal transmitted as 0 level (0,0) from the transmitting side is recognized as 1 level (0,1) at the receiving side, the bit error state is the same as in the case of binary code, but 1 level ( If the signal transmitted as 0, 1) is recognized as 2 levels (1, 1) on the receiving side, unlike the case of binary code, only MSB 1 bit error can be done.

In this way, measures are taken to reduce bit errors as much as possible, even in error-prone transmission methods.

 

As you can see from the explanation so far, from the viewpoint of bit error ratio, LSB is worse than MSB.

Adoption of FEC

FEC stands for Forward Error Correction.

As mentioned above, PAM4 assumes that transmission errors will occur, so FEC is employed to correct these errors.

FEC aims to achieve error-free transmission by adding overhead to the transmission signal so that the receiving side can correct errors.

 

IEEE802.3 stipulates the use of Read Solomon FEC (RS-FEC, RS(544,514)) in interface specifications that assume PAM4, such as 200GAUI-4 and 400GAUI-8.

The 25G NRZ transmission capacity on Ethernet is 25.78 Gbps, so using PAM4 doubles the transmission capacity to 51.56 Gbps. 53.12 Gbps.

 

In IEEE802.3, on the premise that bit errors are sufficiently random (no bursty errors, no deterministic error factors, etc.), the encoded PAM4 signal is decoded at the receiving end. The pre-FEC bit error ratio (Pre FEC BER) is stipulated to be less than 2.4E-4.

In reality, there are various error factors during transmission, so the Pre FEC BER can be reduced below 2.4E-4 so that a stable error-free state can be obtained as a post-FEC decoding bit error ratio (Post FEC BER). It is important to take measures to reduce errors on such transmission lines.

Broadcom PAM4 Optical Transceiver Solution

Broadcom is rolling out PAM4 optical transceiver products.

400Gbps DR4 (500m) Ethernet Transceiver AFCT-91DRDHZ

400Gbps DR4+ (2Km) Ethernet Transceiver AFCT-91DRPHZ

100Gbps DR (500m) Ethernet Transceiver AFCT-89SDHZ

100Gbps FR (2km) Ethernet Transceiver AFCT-89SFHZ

100Gbps LR (10km) Ethernet Transceiver AFCT-89SLHZ

 

Inquiry

Please contact us if you are interested.

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