SoC Beginner's Guide How to access HPS-FPGA

Altera® SoC FPGAs feature an in-device bus connection between the ARM® Cortex®-A9 MPCore™ processor and the FPGA. This in-device connection is expected to eliminate transfer rate limitations between the processor and FPGA and reduce the on-board footprint.

This document describes how to access the Hard Processor System (HPS) and FPGA in Altera® Arria® V SoC FPGAs and Cyclone® V SoC FPGAs.

"SoC Beginner's Guide HPS-FPGA Access Method (Arria® V SoC / Cyclone® V SoC Edition)"