A maximum of fSYSCLK can be input to the USCI module (capable of SPI operation), but in order to determine the value that allows correct data acquisition, it is necessary to take into account the Setup/Valid time on the slave side and perform calculations. There is

○ Formula
Programmable frequency (fUCxCLK) = 1/2tLO/HI
→tLO/HI ≥ max(tVALID,MO(USCI) + tSU,SI(Slave), tSU,MI(USCI) + tVALID,SO(Slave)).

* Meaning of parameters
tVALID,MO(USCI) + tSU,SI(Slave): Master data output establishment time + Slave setup time
tSU,MI(USCI) + tVALID,SO(Slave): Master setup time + Slave data output establishment time

Example: When connecting MSP430F2471s
tLO/HI = max(tVALID,MO(USCI) + tSU,SI(Slave), tSU,MI(USCI) + tVALID,SO(Slave)).
tLO/HI = max(20ns + 15ns, 75ns + 50ns(Typ))
= max(35ns, 125ns) = 125ns
fUCxCLK = 1 / (2* 125ns) = 4MHz