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Microchip FPGA: Initial value of FF in FPGA Fabric (LE). Is the initial value of FF (flip-flop) "0" immediately after power is supplied? Synchronous/asynchronous resets are assumed to be unconnected.
The initial value of FF (flip-flop) in FPGA Fabric is “undefined”.
Every flip-flop in Fabric must have a reset pin (asynchronous or synchronous reset). Otherwise, the value is unknown ( unknown ).
POWER_ON_RESET_N (output from SYSRESET macro) can be used to connect the reset pin of the flip-flop so that it can be initialized to the correct value.
By default, if the flip-flop does not have a reset pin, the logic state after power-up is unknown ( unknown ).
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