Microchip FPGA: Regarding the routing restrictions of XCVR REFCLK. Currently, we would like to be able to use the XCVR REFCLK clock as the system clock on the FPGA_Fabric side. Is it possible to supply the XCVR REFCLK (PF_XCVR_REF_CLK output) as a clock for FPGA_Fabric, input it to CCC, and output the divided clock?

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Microchip FPGA: About REFCLK routing limitation for XCVR. Currently, we are thinking that the REFCLK clock of XCVR can be used as the system clock on the FPGA_Fabric side. Is it possible to supply the REFCLK for XCVR (output of PF_XCVR_REF_CLK) as the clock for FPGA_Fabric, input it to CCC, and output the divided clock?

Libero SoC PolarFire Clock/CCC Transceiver

The ”REF_CLK” output of the PF_XCVR_REF_CLK module can be directly connected to the ”REF_CLK” input port of PF_TX_PLL and the ”REF_CLK” input port of PF_CCC(PLL).

Also, as a note, when driving Fabric directly from the PF_XCVR_REF_CLK module, separately enable (☑) ”Enable fabric clock output” in the Configurator (double-click the module) of the PF_XCVR_REF_CLK module and drive from the ”FAB_REF_CLK” output port. is needed.

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