Category: Simulation
Tool: Diamond
device:-

You can generate a template by following these steps:

① Select "Hierarchy-Post Map Resources" from each window tab of Diamond
② Select and right-click the module for which you want to create a testbench
③ Click to select Verilog Test Fixture Template

This automatically imports the testbench template file with a name such as "○○_tf.v" into the "Input Files" section under the implementation in the "File List" window (attribute is "Simulation" ). At the very least, the stimulus sequence body, etc. must be added.