Regarding simulation using Simulation Wizard, please tell me the difference between "RTL", "Post-Map Gate-Level" and "Post-Route Gate-Level+Timing" selected in "Process Stage".

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Please tell me the difference between "RTL", "Post-Map Gate-Level" and "Post-Route Gate-Level+Timing" selected in "Process Stage" for simulation by Simulation Wizard.

simulation

Category: Simulation
Tool: Diamond
device:-

・RTL

The simulator imports the RTL, compiles it and runs the simulation.

・Post-Map Gate-Level

Simulation is performed using the files (VO, VHO) converted from the netlist generated after mapping. In the "Verilog / VHDL Simulation File" subprocess of "MAP Design", you cannot select unless VO or VHO has been generated in advance.

・Post-Route Gate-Level + Timing

The file (VO, VHO) + delay file (SDF) converted from the netlist after placement and routing is read and simulated. In the "Verilog/VHDL Simulation File" subprocess of "Export Files", you cannot select unless VO or VHO has been generated in advance. It is possible to simulate the movement of the actual machine, but it takes time to execute the simulation.

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・RTL

・Post-Map Gate-Level

・Post-Route Gate-Level + Timing