Tools: ModelSim®
Device: Stratix® V
Category: IP (PCI-Express® (PCIe))


A sample Qsys design and simulation model are provided in the Quartus® II installation directory.
You can use it to simulate PCI-Express with End Point.

The procedure is as follows.

[procedure]
1. Select the example_design directory in your Quartus II installation directory.

(example)
/ip/altera/altera_pcie/altera_pcie_sv_hip_avmm/example_designs/

2. Copy the .qsys file starting with ep_g to your working directory.

3. After starting Qsys, select File menu ⇒ Open ⇒ .qsys, then Generate menu ⇒
Select Generate Testbench System, then set the following and select Generate.

Create testbench Qsys system => Standard,BFMs for standard Qsys interfaces
Create testbench simulation model => Verilog
Allow mixed-language simulation => Turn this option off

4. Start ModelSim and move to the following directory with File menu ⇒ Change Directory.

<working directory>/ep_g*/testbench/mentor

5. Select msim_setup.tcl from ModelSim's Tools menu ⇒ Tcl ⇒ Execute Macro..
Type ld_debug in the window and run it.

6. Right-click ep_g*_tb from the Sim window (Sim tab) and select Add_Wave to add the waveform to observe.
Set.

7. Type run -all to start the simulation.

* You can also perform simulations with ModelSim-Altera® Edition and ModelSim-Altera Starter Edition.
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* This method is for Quartus II v14.0. Other versions may differ slightly.