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I am using HWLib, but please let me know what settings are required other than the Accelerator Coherency Port (ACP) ID Mapper settings.

SoC EDS/DS-5

Currently set of

Cache : L2/L1 enabled
SCTLR, ACTLR : SMP mode ON, FW mode ON
MMU : Static map in TLB file of Section class

Category: SoC


To use ACP, the following two settings are required.

1. "Initialize Snoop Control Unit (SCU)" Implement the following processing near the start of main.
-------------------------------------------------- -----------------
SOCFPGA5XS1_BSP_SCU_CTLR = 0x0; /* Disable SCU */
SOCFPGA5XS1_BSP_SCU_INV_WAY = 0xFFFF; /* Invalidate SCU Tag RAM */
SOCFPGA5XS1_BSP_SCU_CTLR = 0x1; /* Enable SCU */
-------------------------------------------------- -----------------

2. "Set the SMP bit of the Auxiliary Control Register (ACTLR) to ON" * (From your question) Already set
-------------------------------------------------- -----------------
MRC p15,0,r1,c1,c0,1
ORR r1, r1, #0x40
MCR p15,0,r1,c1,c0,1
-------------------------------------------------- -----------------

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