Cyclone V can use DDR3 at up to 80 bits using two HMCs, but is it possible to achieve this with 16 bit x 5 (Total 80 bits)?

Narrow down by specifying conditions

There are currently 4342 results.

Cyclone V can use DDR3 up to 80 bit with two HMCs, but is it possible to achieve 16 bit x 5 (Total 80 bit)?

Device: Cyclone V
IP: External Memory Controller

Cyclone V HMC cannot achieve DDR3 at 16 bit x 5 pcs.
When using the ECC function, it can be used as a 40-bit (32-bit + 8-bit ECC) configuration per HMC.
An invalid configuration will result in an error in the GUI when generating the memory IP.

Experienced FAE
Free consultation is available.

From specific product specifications to parts selection, the Company FAE will answer your technical concerns free of charge. Please feel free to contact us.

Inquiry form

Site Search