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When I use Qsys to generate Onchip-ROM, I can write-access it from the Nios II SBT debugger. Why?

Platform Designer IP Nios II

Category: Quartus® II (Qsys)
Tools: Quartus II, Nios® II Software Build Tool
device:-

 
The write enable of Onchip-ROM generated by Qsys is controlled as follows, and it becomes writable when debugaccess is asserted.

assign wren = chipselect & write & debugaccess;

On Nios II, setting the JTAG Debug Level to 1 or higher generates a debugaccess port, so the Onchip-ROM is in a write-accessible hardware configuration.

For details, please refer to the document below.
https://www.altera.com/en_US/pdfs/literature/manual/mnl_avalon_spec.pdf
(See debugaccess signal descriptions in Table 3-1: Avalon-MM Signals.)

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