Intel: In timing analysis of Quartus II v13.1, setup analysis between clocks with different frequencies is performed with the same phase clocks for Launch Edge and Latch Edge. Please tell me what to do.

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Intel: In Quartus II v13.1 timing analysis, setup analysis between clocks with different frequencies results in timing analysis being performed with in-phase clocks on the Launch Edge and Latch Edge. Please tell me what to do.

Timing constraints/analysis

Category: Timing Constraint/Analysis
Tools: Quartus® II
device:-

It can be improved by creating a quartus.ini file with the following commands in the project directory and compiling again.

timequest_enable_more_accuracy = on

For details, please refer to the release notes below.
https://www.altera.com/en_US/pdfs/literature/rn/archives/rn_qts_131_dev_support.pdf
*Search for "Timing analysis of some complex related cross-clock transfers might be inaccurate".

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