In the DDR3 SDRAM Controller with UniPHY, does mem_reset_n need to be pulled up on the board outside the FPGA?

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In DDR3 SDRAM Controller with UniPHY, does mem_reset_n need to be pulled up on board outside FPGA?

Category: External memory interface
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In DDR3 SDRAM Controller with UniPHY, mem_reset_n does not need to be pulled up outside the FPGA.

For details, please refer to the Knowledge Database (KDB) below.
https://www.altera.com/support/support-resources/knowledge-base/solutions/rd07212013_499.html

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